On 01/23, Pierre-Louis Bossart wrote: > From: Irina Tirdea <irina.tirdea@xxxxxxxxx> > > The BayTrail and CherryTrail platforms provide platform clocks > through their Power Management Controller (PMC). > > The SoC supports up to 6 clocks (PMC_PLT_CLK[0..5]) with a > frequency of either 19.2 MHz (PLL) or 25 MHz (XTAL) for BayTrail > and a frequency of 19.2 MHz (XTAL) for CherryTrail. These clocks > are available for general system use, where appropriate. For example, > the usage for platform clocks suggested in the datasheet is the > following: > PLT_CLK[0..2] - Camera > PLT_CLK[3] - Audio Codec > PLT_CLK[4] - > PLT_CLK[5] - COMMs > > Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@xxxxxxxxxxxxxxx> > Signed-off-by: Irina Tirdea <irina.tirdea@xxxxxxxxx> > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
