On Fri, 18 Mar 2016, fu.wei@xxxxxxxxxx wrote:
> +static u32 __init arch_timer_mem_cnttidr(struct acpi_gtdt_timer_block *gt_block)
> +{
> + phys_addr_t cntctlbase_phy;
> + void __iomem *cntctlbase;
> + u32 cnttidr;
> +
> + cntctlbase_phy = (phys_addr_t)gtdt_gt_cntctlbase(gt_block);
> + if (!cntctlbase_phy) {
> + pr_err("Can't find CNTCTLBase.\n");
> + return 0;
> + }
> +
> + /*
> + * According to ARMv8 Architecture Reference Manual(ARM),
> + * the size of CNTCTLBase frame of memory-mapped timer
> + * is SZ_4K(Offset 0x000 – 0xFFF).
> + */
> + cntctlbase = ioremap(cntctlbase_phy, SZ_4K);
> + if (!cntctlbase) {
> + pr_err("Can't map CNTCTLBase\n");
> + return 0;
> + }
Why are you continuing when you can't find a base address or the remap fails?
> + /*
> + * Get Generic Timer Counter-timer Timer ID Register
> + * for Virtual Timer Capability info
> + */
> + cnttidr = arch_timer_mem_cnttidr(gt_block);
Thanks,
tglx
