On 11/3/2015 12:43 PM, Sinan Kaya wrote:
In any case, the hardware document says 32 bit configuration space
access to the host bridge only. I'll get more clarification.
I got confirmation this morning that this chip supports 32 bit access to
the root complex configuration space. 8/16/32 bits accesses to the
endpoints are supported.
You can probably work around this by using the legacy I/O port method
rather than ECAM, if the PCI host bridge itself is functional and just
the host bus it is connected to is buggy.
From the sounds of it, we'll need a quirk for config space. We support
legacy I/O only to make the endpoints happy. Some endpoints do not get
initialized if they don't have a BAR address assigned to all the BAR
resources.
We'll need an MCFG fix up.
--
Sinan Kaya
Qualcomm Technologies, Inc. on behalf of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a
Linux Foundation Collaborative Project
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