Hi, > From: Borislav Petkov [mailto:bp@xxxxxxxxx] > Sent: Monday, April 27, 2015 4:47 PM > > On Mon, Apr 27, 2015 at 03:16:00AM +0000, Zheng, Lv wrote: > > > @@ -840,7 +840,9 @@ static int ghes_notify_nmi(unsigned int cmd, struct pt_regs *regs) > > > struct ghes *ghes; > > > int sev, ret = NMI_DONE; > > > > > > - raw_spin_lock(&ghes_nmi_lock); > > > + if (!atomic_add_unless(&ghes_in_nmi, 1, 1)) > > > + return ret; > > > + > > > > Just a simple question. > > Why not just using cmpxchg here instead of atomic_add_unless so that no atomic_dec will be needed. > > What do you think atomic_add_unless ends up doing: > > #APP > # 177 "./arch/x86/include/asm/atomic.h" 1 > .pushsection .smp_locks,"a" > .balign 4 > .long 671f - . > .popsection > 671: > lock; cmpxchgl %edx,ghes_in_nmi(%rip) # D.37056, MEM[(volatile u32 *)&ghes_in_nmi] > # 0 "" 2 > #NO_APP > > And you need to atomic_dec() so that another reader can enter, i.e. how > the exclusion primitive works. > > Or did you have something else in mind? My mistake. I mean cmpxchg() and xchg() (or atomic_cmpxchg() and atomic_xchg()) pair here, so nothing can be reduced. But IMO, atomic_add_unless() is implemented via cmpxchg on many architectures. And it might be better to use it directly here which is a bit faster as you actually only need one value switch here. Thanks and best regards -Lv > > -- > Regards/Gruss, > Boris. > > ECO tip #101: Trim your mails when you reply. > -- ��.n��������+%������w��{.n�����{�����ܨ}���Ơz�j:+v�����w����ޙ��&�)ߡ�a����z�ޗ���ݢj��w�f
