On Wed, Mar 11, 2015 at 9:12 AM, Tomasz Nowicki
<tomasz.nowicki@xxxxxxxxxx> wrote:
> From now on, readb()/writeb()/etc. generic calls are used as default
> approach. Special MMIO accessors are registered for AMD Fam10h CPUs only.
>
> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@xxxxxxxxxx>
> ---
> arch/x86/include/asm/pci_x86.h | 8 +++
> arch/x86/pci/mmconfig-shared.c | 114 +++++++++++++++++++++++++++++++++++++++++
> arch/x86/pci/mmconfig_32.c | 24 +--------
> arch/x86/pci/mmconfig_64.c | 24 +--------
> arch/x86/pci/numachip.c | 24 +--------
> 5 files changed, 128 insertions(+), 66 deletions(-)
>
> diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
> index d024f4d..c57c225 100644
> --- a/arch/x86/include/asm/pci_x86.h
> +++ b/arch/x86/include/asm/pci_x86.h
> @@ -137,6 +137,11 @@ struct pci_mmcfg_region {
> char name[PCI_MMCFG_RESOURCE_NAME_LEN];
> };
>
> +struct pci_mmcfg_mmio_ops {
> + u32 (*read)(int len, void __iomem *addr);
> + void (*write)(int len, void __iomem *addr, u32 value);
We already have nearly the same struct with pci_ops...
> +};
> +
> extern int __init pci_mmcfg_arch_init(void);
> extern void __init pci_mmcfg_arch_free(void);
> extern int pci_mmcfg_arch_map(struct pci_mmcfg_region *cfg);
> @@ -145,6 +150,9 @@ extern int pci_mmconfig_insert(struct device *dev, u16 seg, u8 start, u8 end,
> phys_addr_t addr);
> extern int pci_mmconfig_delete(u16 seg, u8 start, u8 end);
> extern struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus);
> +extern u32 pci_mmio_read(int len, void __iomem *addr);
> +extern void pci_mmio_write(int len, void __iomem *addr, u32 value);
> +extern void pci_mmconfig_register_mmio(struct pci_mmcfg_mmio_ops *ops);
>
> extern struct list_head pci_mmcfg_list;
>
> diff --git a/arch/x86/pci/mmconfig-shared.c b/arch/x86/pci/mmconfig-shared.c
> index dd30b7e..8b3bc4f 100644
> --- a/arch/x86/pci/mmconfig-shared.c
> +++ b/arch/x86/pci/mmconfig-shared.c
> @@ -31,6 +31,118 @@ static DEFINE_MUTEX(pci_mmcfg_lock);
>
> LIST_HEAD(pci_mmcfg_list);
>
> +static u32
> +pci_mmconfig_generic_read(int len, void __iomem *addr)
> +{
> + u32 data = 0;
> +
> + switch (len) {
> + case 1:
> + data = readb(addr);
> + break;
> + case 2:
> + data = readw(addr);
> + break;
> + case 4:
> + data = readl(addr);
> + break;
> + }
This same function logic already exists with pci_generic_config_read.
I think you need to move the differentiation between AMD and generic
ECAM to pci_ops.
Rob
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