On Tue, Jan 22, 2013 at 10:47:54AM -0800, Mike Turquette wrote: > Quoting Mika Westerberg (2013-01-18 05:46:00) > > Intel Lynxpoint Low Power Subsystem hosts peripherals like UART, I2C and > > SPI controllers. For most of these there is a configuration register that > > allows software to enable and disable the functional clock. Disabling the > > clock while the peripheral is not used saves power. > > > > In order to take advantage of this we add a new clock gate of type > > lpss_gate that just re-uses the ordinary clk_gate but in addition is able > > to enumerate the base address register of the device using ACPI. > > > > We then create a clock tree that models the Lynxpoint LPSS clocks using > > these gates and fixed clocks so that we can pass clock rate to the drivers > > as well. > > > > Signed-off-by: Heikki Krogerus <heikki.krogerus@xxxxxxxxxxxxxxx> > > Signed-off-by: Mika Westerberg <mika.westerberg@xxxxxxxxxxxxxxx> > > Reviewed-by: Mark Brown <broonie@xxxxxxxxxxxxxxxxxxxxxxxxxxx> > > Nice to see another architecture using this framework. > > Acked-by: Mike Turquette <mturquette@xxxxxxxxxx> Thanks! How about x86 maintainers? Do you have any comments on the series? -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
