On Wednesday, January 16, 2013 05:03:29 PM Lans Zhang wrote:
> The bit width check was introduced by 15afae60 (ACPI, APEI: Fix
> incorrect APEI register bit width check and usage), and a fixup
> for incorrect 32-bit width memory address was given by f712c71
> (ACPI, APEI: Fixup common access width firmware bug). Now there
> is a similar symptom:
>
> [Firmware Bug]: APEI: Invalid bit width + offset in GAR [0x12345000/64/0/3/0]
>
> Another bogus BIOS reports an incorrect 64-bit width in trigger table.
> Thus, apply to a similar workaround for 64-bit width memory address.
This makes sense to me, but I'd like more people to have a look at it (Myron,
Ying, Gary CCed).
Thanks,
Rafael
> Signed-off-by: Lans Zhang <jia.zhang@xxxxxxxxxxxxx>
> ---
> drivers/acpi/apei/apei-base.c | 3 +++
> 1 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/acpi/apei/apei-base.c b/drivers/acpi/apei/apei-base.c
> index 00a7836..46f80e2 100644
> --- a/drivers/acpi/apei/apei-base.c
> +++ b/drivers/acpi/apei/apei-base.c
> @@ -590,6 +590,9 @@ static int apei_check_gar(struct acpi_generic_address *reg, u64 *paddr,
> if (bit_width == 32 && bit_offset == 0 && (*paddr & 0x03) == 0 &&
> *access_bit_width < 32)
> *access_bit_width = 32;
> + else if (bit_width == 64 && bit_offset == 0 && (*paddr & 0x07) == 0 &&
> + *access_bit_width < 64)
> + *access_bit_width = 64;
>
> if ((bit_width + bit_offset) > *access_bit_width) {
> pr_warning(FW_BUG APEI_PFX
>
--
I speak only for myself.
Rafael J. Wysocki, Intel Open Source Technology Center.
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