Hi, I recently purchased a fairly recent (2011) model Panasonic CF-S10 laptop with an Intel Core i5-2540M CPU. I've noticed that under normal operation with the mainline 3.3.4 kernel I can consistently provoke machine checks when loading the system, such as by running a -j4 kernel build. The following log is produced by running cpufreq-info -f (the first frequency), -w (the 2nd frequency) for all CPUs, and looking at the temperatures of /sys/class/thermal_zone[0,1] once a second while starting a kernel build on a freshly booted system with the ondemand cpufreq governor. I have additionally correlated the kernel (and mcelog) messages with that output and inserted them into the log: [Wed May 9 15:56:00 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:01 CEST 2012] cpu0 800000/2601000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 2601000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:02 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:04 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:05 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:06 CEST 2012] cpu0 800000/2601000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 2601000/2601000 tz0 61000 tz1 61000 [Wed May 9 15:56:07 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:08 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:09 CEST 2012] cpu0 800000/2601000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 2601000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:10 CEST 2012] cpu0 2601000/2601000 cpu1 800000/2601000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 61000 tz1 61000 [Wed May 9 15:56:11 CEST 2012] cpu0 800000/800000 cpu1 800000/2601000 cpu2 800000/800000 cpu3 2601000/2601000 tz0 61000 tz1 61000 [Wed May 9 15:56:12 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:13 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61100 tz1 61100 [Wed May 9 15:56:14 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61100 tz1 61100 [Wed May 9 15:56:15 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:16 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:17 CEST 2012] cpu0 800000/2601000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 2601000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:18 CEST 2012] cpu0 800000/2601000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 2601000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:19 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:20 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:21 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:22 CEST 2012] cpu0 800000/800000 cpu1 800000/2601000 cpu2 2601000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:23 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:24 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:25 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:26 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:27 CEST 2012] cpu0 800000/2601000 cpu1 800000/2601000 cpu2 2601000/2601000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:28 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 61000 tz1 61000 [Wed May 9 15:56:29 CEST 2012] cpu0 800000/2601000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 1200000/800000 tz0 63800 tz1 63800 [Wed May 9 15:56:30 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 1000000/800000 tz0 64100 tz1 64100 *** Build starts roughly here *** [Wed May 9 15:56:31 CEST 2012] cpu0 800000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 800000/2601000 tz0 64100 tz1 64100 [Wed May 9 15:56:32 CEST 2012] cpu0 2601000/800000 cpu1 2601000/2601000 cpu2 800000/800000 cpu3 800000/1000000 tz0 64300 tz1 64300 [Wed May 9 15:56:33 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/800000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 64600 tz1 64600 [Wed May 9 15:56:34 CEST 2012] cpu0 2601000/800000 cpu1 800000/2601000 cpu2 800000/2601000 cpu3 800000/800000 tz0 65400 tz1 65400 [Wed May 9 15:56:35 CEST 2012] cpu0 800000/800000 cpu1 800000/2601000 cpu2 2601000/800000 cpu3 2601000/2601000 tz0 65600 tz1 65600 [Wed May 9 15:56:36 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 65700 tz1 65700 [Wed May 9 15:56:37 CEST 2012] cpu0 800000/2601000 cpu1 2601000/2601000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 65700 tz1 65700 [Wed May 9 15:56:38 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 65700 tz1 65700 [Wed May 9 15:56:39 CEST 2012] cpu0 2601000/2601000 cpu1 800000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 66300 tz1 66300 [Wed May 9 15:56:40 CEST 2012] cpu0 800000/800000 cpu1 800000/2601000 cpu2 800000/800000 cpu3 2601000/800000 tz0 67900 tz1 67900 [Wed May 9 15:56:41 CEST 2012] cpu0 800000/2601000 cpu1 2601000/800000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 67900 tz1 67900 [Wed May 9 15:56:42 CEST 2012] cpu0 2601000/800000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 800000/800000 tz0 67300 tz1 67300 [Wed May 9 15:56:43 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 67300 tz1 67300 [Wed May 9 15:56:44 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 67300 tz1 67300 [Wed May 9 15:56:45 CEST 2012] cpu0 800000/800000 cpu1 800000/2601000 cpu2 2601000/2601000 cpu3 1600000/2601000 tz0 67300 tz1 67300 [Wed May 9 15:56:46 CEST 2012] cpu0 2601000/2601000 cpu1 800000/2601000 cpu2 800000/2601000 cpu3 2601000/2601000 tz0 67400 tz1 67400 [Wed May 9 15:56:47 CEST 2012] cpu0 1000000/2601000 cpu1 800000/2601000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 67800 tz1 67800 [Wed May 9 15:56:49 CEST 2012] cpu0 800000/800000 cpu1 800000/2601000 cpu2 800000/800000 cpu3 2601000/2601000 tz0 67800 tz1 67800 [Wed May 9 15:56:50 CEST 2012] cpu0 2601000/2601000 cpu1 800000/800000 cpu2 2601000/800000 cpu3 800000/800000 tz0 67700 tz1 67700 [Wed May 9 15:56:51 CEST 2012] cpu0 800000/2601000 cpu1 800000/2601000 cpu2 800000/2601000 cpu3 2601000/2601000 tz0 67700 tz1 67700 [Wed May 9 15:56:52 CEST 2012] cpu0 800000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 800000/2601000 tz0 67700 tz1 67700 [Wed May 9 15:56:53 CEST 2012] cpu0 2601000/800000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 67800 tz1 67800 [Wed May 9 15:56:54 CEST 2012] cpu0 800000/2601000 cpu1 800000/2601000 cpu2 2601000/2601000 cpu3 1200000/2601000 tz0 67800 tz1 67800 [Wed May 9 15:56:55 CEST 2012] cpu0 800000/800000 cpu1 800000/2000000 cpu2 800000/2000000 cpu3 2000000/2000000 tz0 67800 tz1 67800 [Wed May 9 15:56:56 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 67800 tz1 67800 [Wed May 9 15:56:57 CEST 2012] cpu0 800000/2601000 cpu1 2601000/2601000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 67700 tz1 67700 [Wed May 9 15:56:58 CEST 2012] cpu0 2601000/2601000 cpu1 2200000/2601000 cpu2 2600000/2601000 cpu3 2200000/2601000 tz0 67800 tz1 67800 [Wed May 9 15:56:59 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 67800 tz1 67800 [Wed May 9 15:57:00 CEST 2012] cpu0 2601000/2601000 cpu1 800000/2601000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 71300 tz1 71300 [Wed May 9 15:57:01 CEST 2012] cpu0 800000/2601000 cpu1 2601000/2601000 cpu2 800000/2601000 cpu3 800000/2601000 tz0 80600 tz1 80600 [Wed May 9 15:57:02 CEST 2012] cpu0 800000/2601000 cpu1 800000/2601000 cpu2 800000/2601000 cpu3 2601000/2601000 tz0 80600 tz1 80600 [Wed May 9 15:57:03 CEST 2012] cpu0 1400000/2601000 cpu1 2601000/2601000 cpu2 800000/2601000 cpu3 2601000/2601000 tz0 77700 tz1 77700 [Wed May 9 15:57:04 CEST 2012] cpu0 800000/2601000 cpu1 800000/2601000 cpu2 2601000/2601000 cpu3 800000/2601000 tz0 77700 tz1 77700 [Wed May 9 15:57:05 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 77700 tz1 77700 [Wed May 9 15:57:06 CEST 2012] cpu0 2000000/2601000 cpu1 2601000/2601000 cpu2 2601000/2600000 cpu3 1600000/2601000 tz0 78400 tz1 78400 [Wed May 9 15:57:07 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80900 tz1 80900 May 9 15:57:07 nodbug kernel: [ 586.351347] CPU1: Core temperature/speed normal May 9 15:57:07 nodbug kernel: [ 586.351351] CPU2: Package temperature/speed normal May 9 15:57:07 nodbug kernel: [ 586.351353] CPU0: Package temperature/speed normal May 9 15:57:07 nodbug kernel: [ 586.351356] CPU1: Package temperature/speed normal May 9 15:57:07 nodbug kernel: [ 586.356899] CPU3: Core temperature/speed normal May 9 15:57:07 nodbug kernel: [ 586.356902] CPU3: Package temperature/speed normal [Wed May 9 15:57:08 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 90700 tz1 90700 [Wed May 9 15:57:09 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 90700 tz1 90700 [Wed May 9 15:57:10 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 76500 tz1 76500 [Wed May 9 15:57:11 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 76500 tz1 76500 [Wed May 9 15:57:12 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 76500 tz1 76500 [Wed May 9 15:57:13 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 92700 tz1 92700 [Wed May 9 15:57:14 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 92700 tz1 92700 [Wed May 9 15:57:15 CEST 2012] cpu0 2601000/2601000 cpu1 2400000/2600000 cpu2 2601000/2601000 cpu3 2400000/2601000 tz0 77600 tz1 77600 [Wed May 9 15:57:16 CEST 2012] cpu0 2200000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 77600 tz1 77600 [Wed May 9 15:57:17 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 77600 tz1 77600 [Wed May 9 15:57:18 CEST 2012] cpu0 1000000/1000000 cpu1 800000/1000000 cpu2 1000000/1000000 cpu3 800000/1000000 tz0 92700 tz1 92700 [Wed May 9 15:57:19 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 92700 tz1 92700 [Wed May 9 15:57:20 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2600000/2601000 cpu3 2601000/2601000 tz0 78000 tz1 78000 [Wed May 9 15:57:21 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 78000 tz1 78000 May 9 15:57:21 nodbug kernel: [ 599.746720] [Hardware Error]: Machine check events logged May 9 15:57:21 nodbug mcelog: Processor 1 heated above trip temperature. Throttling enabled. May 9 15:57:21 nodbug mcelog: Please check your system cooling. Performance will be impacted May 9 15:57:21 nodbug mcelog: Processor 1 below trip temperature. Throttling disabled May 9 15:57:21 nodbug mcelog: Processor 3 heated above trip temperature. Throttling enabled. May 9 15:57:21 nodbug mcelog: Please check your system cooling. Performance will be impacted May 9 15:57:21 nodbug mcelog: Processor 3 below trip temperature. Throttling disabled [Wed May 9 15:57:22 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 78000 tz1 78000 [Wed May 9 15:57:23 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93600 tz1 93600 [Wed May 9 15:57:24 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 800000/1000000 cpu3 1000000/1000000 tz0 93600 tz1 93600 [Wed May 9 15:57:25 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 78600 tz1 78600 [Wed May 9 15:57:26 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 78600 tz1 78600 [Wed May 9 15:57:27 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2600000/2601000 cpu3 2601000/2601000 tz0 78600 tz1 78600 [Wed May 9 15:57:28 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93700 tz1 93700 [Wed May 9 15:57:29 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93700 tz1 93700 [Wed May 9 15:57:30 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79000 tz1 79000 [Wed May 9 15:57:31 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79000 tz1 79000 [Wed May 9 15:57:32 CEST 2012] cpu0 2600000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79000 tz1 79000 [Wed May 9 15:57:33 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93800 tz1 93800 [Wed May 9 15:57:34 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93800 tz1 93800 [Wed May 9 15:57:35 CEST 2012] cpu0 1600000/2601000 cpu1 2400000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79400 tz1 79400 [Wed May 9 15:57:36 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2600000/2601000 cpu3 2601000/2601000 tz0 79400 tz1 79400 [Wed May 9 15:57:37 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79400 tz1 79400 [Wed May 9 15:57:38 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93700 tz1 93700 [Wed May 9 15:57:40 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93700 tz1 93700 [Wed May 9 15:57:41 CEST 2012] cpu0 1400000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2600000/2601000 tz0 79700 tz1 79700 [Wed May 9 15:57:42 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79700 tz1 79700 [Wed May 9 15:57:43 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79700 tz1 79700 [Wed May 9 15:57:44 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93700 tz1 93700 [Wed May 9 15:57:45 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80100 tz1 80100 [Wed May 9 15:57:46 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 1200000/2601000 tz0 80100 tz1 80100 [Wed May 9 15:57:47 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80100 tz1 80100 [Wed May 9 15:57:48 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:57:49 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:57:50 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80400 tz1 80400 [Wed May 9 15:57:51 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80400 tz1 80400 [Wed May 9 15:57:52 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80400 tz1 80400 [Wed May 9 15:57:53 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93900 tz1 93900 [Wed May 9 15:57:54 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93900 tz1 93900 [Wed May 9 15:57:55 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2400000/2601000 cpu3 1600000/2601000 tz0 80300 tz1 80300 [Wed May 9 15:57:56 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80300 tz1 80300 [Wed May 9 15:57:57 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80300 tz1 80300 [Wed May 9 15:57:58 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93400 tz1 93400 [Wed May 9 15:57:59 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93400 tz1 93400 [Wed May 9 15:58:00 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80700 tz1 80700 [Wed May 9 15:58:01 CEST 2012] cpu0 2601000/2601000 cpu1 2000000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80700 tz1 80700 [Wed May 9 15:58:02 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80700 tz1 80700 [Wed May 9 15:58:03 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:58:04 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:58:05 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80900 tz1 80900 [Wed May 9 15:58:06 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80900 tz1 80900 [Wed May 9 15:58:07 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80900 tz1 80900 [Wed May 9 15:58:08 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93900 tz1 93900 [Wed May 9 15:58:09 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93900 tz1 93900 [Wed May 9 15:58:10 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81000 tz1 81000 [Wed May 9 15:58:11 CEST 2012] cpu0 2600000/2600000 cpu1 2601000/2600000 cpu2 2601000/2600000 cpu3 2200000/2600000 tz0 79000 tz1 79000 [Wed May 9 15:58:12 CEST 2012] cpu0 1400000/2600000 cpu1 2601000/2600000 cpu2 1200000/2600000 cpu3 2601000/2600000 tz0 79000 tz1 79000 [Wed May 9 15:58:13 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79000 tz1 79000 [Wed May 9 15:58:14 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93600 tz1 93600 [Wed May 9 15:58:15 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93600 tz1 93600 [Wed May 9 15:58:16 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81000 tz1 81000 [Wed May 9 15:58:17 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 78800 tz1 78800 [Wed May 9 15:58:18 CEST 2012] cpu0 2601000/2601000 cpu1 2400000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 78800 tz1 78800 [Wed May 9 15:58:20 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 78800 tz1 78800 [Wed May 9 15:58:21 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 800000/1000000 tz0 93800 tz1 93800 [Wed May 9 15:58:22 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93800 tz1 93800 [Wed May 9 15:58:23 CEST 2012] cpu0 2601000/2601000 cpu1 2200000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80700 tz1 80700 [Wed May 9 15:58:24 CEST 2012] cpu0 2601000/2600000 cpu1 2601000/2600000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80700 tz1 80700 [Wed May 9 15:58:25 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80700 tz1 80700 [Wed May 9 15:58:26 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93800 tz1 93800 [Wed May 9 15:58:27 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80900 tz1 80900 [Wed May 9 15:58:28 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80900 tz1 80900 [Wed May 9 15:58:29 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 80900 tz1 80900 [Wed May 9 15:58:30 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:58:31 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:58:32 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81000 tz1 81000 [Wed May 9 15:58:33 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79100 tz1 79100 [Wed May 9 15:58:34 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79100 tz1 79100 [Wed May 9 15:58:35 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79100 tz1 79100 [Wed May 9 15:58:36 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:58:37 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:58:38 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81500 tz1 81500 [Wed May 9 15:58:39 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:40 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:41 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:42 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93100 tz1 93100 [Wed May 9 15:58:43 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93100 tz1 93100 [Wed May 9 15:58:44 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81300 tz1 81300 [Wed May 9 15:58:45 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2000000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:46 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2400000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:47 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:48 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93200 tz1 93200 [Wed May 9 15:58:49 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93200 tz1 93200 [Wed May 9 15:58:50 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81300 tz1 81300 [Wed May 9 15:58:51 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:52 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:53 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79300 tz1 79300 [Wed May 9 15:58:54 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93700 tz1 93700 [Wed May 9 15:58:55 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93700 tz1 93700 [Wed May 9 15:58:56 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81200 tz1 81200 [Wed May 9 15:58:57 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79100 tz1 79100 [Wed May 9 15:58:59 CEST 2012] cpu0 2400000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79100 tz1 79100 [Wed May 9 15:59:00 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79100 tz1 79100 [Wed May 9 15:59:01 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93900 tz1 93900 [Wed May 9 15:59:02 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 93900 tz1 93900 [Wed May 9 15:59:03 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81600 tz1 81600 [Wed May 9 15:59:04 CEST 2012] cpu0 2601000/2601000 cpu1 2400000/2601000 cpu2 2600000/2601000 cpu3 2600000/2601000 tz0 79500 tz1 79500 [Wed May 9 15:59:05 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2601000/2601000 cpu3 2601000/2601000 tz0 79500 tz1 79500 [Wed May 9 15:59:06 CEST 2012] cpu0 2601000/2601000 cpu1 2601000/2601000 cpu2 2200000/2601000 cpu3 2601000/2601000 tz0 79500 tz1 79500 [Wed May 9 15:59:07 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 94000 tz1 94000 [Wed May 9 15:59:08 CEST 2012] cpu0 1000000/1000000 cpu1 1000000/1000000 cpu2 1000000/1000000 cpu3 1000000/1000000 tz0 81300 tz1 81300 *** I killed the build here *** [Wed May 9 15:59:09 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 79600 tz1 79600 [Wed May 9 15:59:10 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 76000 tz1 76000 [Wed May 9 15:59:11 CEST 2012] cpu0 800000/2601000 cpu1 800000/800000 cpu2 800000/2601000 cpu3 2601000/800000 tz0 74500 tz1 74500 [Wed May 9 15:59:12 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 73900 tz1 73900 [Wed May 9 15:59:13 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 73300 tz1 73300 [Wed May 9 15:59:14 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 73000 tz1 73000 [Wed May 9 15:59:15 CEST 2012] cpu0 800000/800000 cpu1 800000/800000 cpu2 800000/800000 cpu3 800000/800000 tz0 72900 tz1 72900 I have several questions: 1) Is this normal? Should I be worried about my machine's cooling? 2) The kernel claims to have enabled and then disabled throttling, but the cpu frequencies reported (and subjectively, expected performance) don't seem to reflect that as we can see by the presence of 1GHz in the log. 3) I assume throttling was enabled because of the tz0 passive trip point? (from acpi -V): Thermal 0: ok, 60.8 degrees C Thermal 0: trip point 0 switches to mode critical at temperature 130.0 degrees C Thermal 0: trip point 1 switches to mode passive at temperature 81.0 degrees C Thermal 1: ok, 60.8 degrees C Thermal 1: trip point 0 switches to mode critical at temperature 105.0 degrees C 4) .../cpu0/cpufreq/scaling_available_frequencies gives: 2601000 2600000 2400000 2200000 2000000 1800000 1600000 1400000 1200000 1000000 800000 What is 2601000? Some googling seems to suggest it might be a step for "Turbo mode" but this is not documented anywhere. 5) I also tried monitoring the CPU speed with "i7z" [1] which unlike cpufreq-info actually appears to be able to report the turbo mode frequencies, but that showed similarly strange results (e.g. CPU running at 1GHz as above). Can i7z direct access to MSRs confuse or otherwise affect the kernel cpufreq governor? 6) If I run a kernel build for longer, I don't usually see more MCEs (maybe one or two, maybe none). Haven't tried monitoring the thermal zones and frequencies for a full build, will do that now. -mato -- Martin Lucina http://lucina.net/ (interwebs/blogs/rants/consulting) martin@xxxxxxxxxx (smtp/xmpp/jabber/gtalk) @matolucina (twitter) -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
