On Thu, Apr 07, 2011 at 09:29:03AM +0800, Huang Ying wrote: > cmpxchg() is widely used by lockless code, including NMI-safe lockless > code. But on some architectures, the cmpxchg() implementation is not > NMI-safe, on these architectures the lockless code may need to a > spin_trylock_irqsave() based implementation. > > This patch adds a Kconfig option: ARCH_HAVE_NMI_SAFE_CMPXCHG, so that > NMI-safe lockless code can depend on it or provide different > implementation according to it. > > On many architectures, cmpxchg is only NMI-safe for several specific > operand sizes. So, ARCH_HAVE_NMI_SAFE_CMPXCHG define in this patch > only guarantees cmpxchg is NMI-safe for sizeof(unsigned long). As this no longer touches any ARM code, I thinky you can drop me from the CC list. Thanks. -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
