Em 25-10-2010 15:07, Tony Luck escreveu: > On Mon, Oct 25, 2010 at 5:04 AM, Mauro Carvalho Chehab > <mchehab@xxxxxxxxxx> wrote: >> We had some discussions with Intel during the Collaboration summit about that, trying to >> integrate Nehalem EX on such environment, with, unfortunately, didn't happen, as Intel >> didn't release any (public) datasheet describing Nehalem EX memory controller, nor wrote >> such driver. > > The chipset registers that are needed to write an EDAC driver for > Nehalem-EX (a.k.a Xeon > 7500 series) are not accessible to OS (ring 0) code. Documenting them > wouldn't change this. Yeah, I know. The error reporting mechanism could do something similar to i7core_edac driver to parse the MCE NMI errors to userspace via EDAC interface, but without any way to get the memory topology, this wouldn't work. With some documentation, maybe we could find a way for a kernel code to retrieve the memory topology, maybe via BIOS, and make it work. >> As most of us will be in Boston next week, I've reserved a BoF at Plumbers for us to discuss >> about this subject: >> >> http://www.linuxplumbersconf.org/2010/ocw/proposals/921 > > An excellent idea. See you there. OK, See you there. Thanks, Mauro -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
