On Tue, Sep 7, 2010 at 5:43 PM, Thomas Renninger <trenn@xxxxxxx> wrote: > On Tuesday 07 September 2010 17:22:46 Matthew Garrett wrote: >> On Mon, Sep 06, 2010 at 10:47:58PM +0100, Tiago Marques wrote: >> >> > Yes, but shouldn't it detect P-States with different voltages, as in >> > windows? (even as stupid as this sounds) I sure loved to get it always >> > stuck at the lower clock, given that I usually perform maintenance on >> > PCs I highly doubt the fan would get dust clogged to the point of >> > taking the CPU to temperatures that would cause problems. >> > This looks like it doesn't support Speedstep even though Intel says it >> > does but the fact is that Windows can work with two voltages, which >> > always improves power. >> >> If there's only one frequency then there's no reason to have multiple >> voltages - the voltage will already be at the minimum possible for the >> core to be stable at that frequency. Entering C4 will typically result >> in the voltage dropping as parts of the core are disabled. >> >> Does your chip have the "est" flag in /proc/cpuinfo? If not, it doesn't >> support speedstep. > That is somewhat strange. These CPUs show est support in cpuinfo, also > compare with (not only about HP, but also other OEMs): > [Bug 16072] [HP Pavilion dm1-1110ev] Cpufreq doesn't work at all ( Intel Celeron U2300 ) > https://bugzilla.kernel.org/show_bug.cgi?id=16072 > > But Tiago digged out an Intel spec which says that the SU processors do only > run at one freq: > http://www.intel.com/design/mobile/datashts/321111.pdf > page 30, note 10, at the top of the page. > > I could imagine cpuid should not export est capabilities for these and > cpufreq drivers should not complain that an est capable CPU is found for > which no frequencies get exported, but probably only Intel can tell for > sure. I'd love input on this, because with the lower voltage being there I could probably get away with using it even in load usage since I tend to keep vents clean and temperatures here aren't high. coretemp is showing me around 60ÂC in load. To me, having a lower voltage when the CPU has to come out of C4 into C0 is an advantage, one which I hope to measure. When having the CPU run at C0 in light loads(<50%) would also be useful to have the lower voltage there, kicking it up when the two cores are +80% to keep stability in check with the temperature rise(if needed...). Or am I completely wrong and when having 50% load the CPU also does a lot of C4 idling? The only reason I took the plunge with a Celeron processor, besides being the only one available in the DM1 around here, was that it supported EIST. I would not get one laptop without it, so let's say I was a bit perplexed when I tried to get it to run and failed. Best regards, Tiago > > Â Â Thomas > -- To unsubscribe from this list: send the line "unsubscribe linux-acpi" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
