Hi Arjan,
On Mon, Aug 11, 2008 at 04:58:16PM -0700, Arjan van de Ven wrote:
> > Hi,
> >
> > On Mon, Aug 11, 2008 at 07:11:28AM -0700, Arjan van de Ven wrote:
> > > 1) when the cpu is idle (as in "idle loop C states/hlt"; p4_clockmod
> > > doesn't mean anything.. the clock is stopped not just skipped.
> > > 2) when the cpu is executing code (eg non-idle), it takes more power
> > > for a unit of time than it takes when it's idle
> >
> > This statement might be true, but might also be wrong:
> > a) on systems where only C1 is exported, p4-clockmod most
> > often equals the state the CPU is in when in C1[*],
>
> that's.. not entirely true btw.
well, the spec isn't really clear about this. It says (IA32 Intel
Architecture Software Developer's Manual, Volume 3, section 13.14.3) that
P6 family processors did this using STPCLK#. And STPCLK# was also used by the
chipset to force the CPU to enter C2, IIRC.
Do P4s only do an C1-equivalent (or even less than that) now, as they do the
thermal throttling internally instead of externally using STPCLK#?
> >so we're in a
> > win-win, or lose-lose situation.
>
> even if it were EXACTLY identical (which it isn't).. you would be at
> BEST a tie... not a savings. so it's lose-lose or tie-tie, but never win
If it's C2-equivalent vs. C1, it's a win. So throttling would be a win from
this perspective on a only C1-capable PIII, but not on a P4? Is that what
you're trying to hint at here?
To summarize:
(1) p6 family processors use STPCLK# initiated by the chipset for thermal
throttling.
(2) STPCLK# is also used by the chipset to make the CPU enter C2.
(3) p4-clockmod uses the STPCLK#-equivalent in p4 CPUs.
(4) Therefore, it is as effective as STPCLK#, and as effective as C2.
(5) STPCLK#/C2 has higher energy savings than hlt/C1.
(6) therefore, p4-clockmod might make sense on systems which only export C1
as an idle state.
Where's my mistake?
Thanks,
Dominik
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