X86_FEATURE_REP_GOOD is only set for family 6 processors. Extend the check to family numbers beyond 15. It is uncertain whether the Pentium 4s (family 15) should set the feature flag as well. Commit 185f3b9da24c ("x86: make intel.c have 64-bit support code") that originally set X86_FEATURE_REP_GOOD also set the x86_cache_alignment preference for family 15 processors. The omission of the family 15 seems intentional. Also, the 32-bit user copy alignment preference is only set for family 6 and 15 processors. Extend the preference to family numbers beyond 15. Signed-off-by: Sohil Mehta <sohil.mehta@xxxxxxxxx> --- arch/x86/kernel/cpu/intel.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 8ded9f859a3a..f44b2e618fb3 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -449,23 +449,16 @@ static void intel_workarounds(struct cpuinfo_x86 *c) (c->x86_stepping < 0x6 || c->x86_stepping == 0xb)) set_cpu_bug(c, X86_BUG_11AP); - #ifdef CONFIG_X86_INTEL_USERCOPY /* * Set up the preferred alignment for movsl bulk memory moves + * Family 4 - 486: untested + * Family 5 - Pentium: untested + * Family 6 - PII/PIII only like movsl with 8-byte alignment + * Family 15 - P4 is OK down to 8-byte alignment */ - switch (c->x86) { - case 4: /* 486: untested */ - break; - case 5: /* Old Pentia: untested */ - break; - case 6: /* PII/PIII only like movsl with 8-byte alignment */ - movsl_mask.mask = 7; - break; - case 15: /* P4 is OK down to 8-byte alignment */ + if (c->x86_vfm >= INTEL_PENTIUM_PRO) movsl_mask.mask = 7; - break; - } #endif intel_smp_check(c); @@ -563,7 +556,7 @@ static void init_intel(struct cpuinfo_x86 *c) #ifdef CONFIG_X86_64 if (c->x86 == 15) c->x86_cache_alignment = c->x86_clflush_size * 2; - if (c->x86 == 6) + if (c->x86 == 6 || c->x86 > 15) set_cpu_cap(c, X86_FEATURE_REP_GOOD); #else /* -- 2.43.0