>-----Original Message----- >From: Dave Jiang <dave.jiang@xxxxxxxxx> >Sent: 05 November 2024 20:32 >To: Shiju Jose <shiju.jose@xxxxxxxxxx>; linux-edac@xxxxxxxxxxxxxxx; linux- >cxl@xxxxxxxxxxxxxxx; linux-acpi@xxxxxxxxxxxxxxx; linux-mm@xxxxxxxxx; linux- >kernel@xxxxxxxxxxxxxxx >Cc: bp@xxxxxxxxx; tony.luck@xxxxxxxxx; rafael@xxxxxxxxxx; lenb@xxxxxxxxxx; >mchehab@xxxxxxxxxx; dan.j.williams@xxxxxxxxx; dave@xxxxxxxxxxxx; Jonathan >Cameron <jonathan.cameron@xxxxxxxxxx>; gregkh@xxxxxxxxxxxxxxxxxxx; >sudeep.holla@xxxxxxx; jassisinghbrar@xxxxxxxxx; alison.schofield@xxxxxxxxx; >vishal.l.verma@xxxxxxxxx; ira.weiny@xxxxxxxxx; david@xxxxxxxxxx; >Vilas.Sridharan@xxxxxxx; leo.duran@xxxxxxx; Yazen.Ghannam@xxxxxxx; >rientjes@xxxxxxxxxx; jiaqiyan@xxxxxxxxxx; Jon.Grimm@xxxxxxx; >dave.hansen@xxxxxxxxxxxxxxx; naoya.horiguchi@xxxxxxx; >james.morse@xxxxxxx; jthoughton@xxxxxxxxxx; somasundaram.a@xxxxxxx; >erdemaktas@xxxxxxxxxx; pgonda@xxxxxxxxxx; duenwen@xxxxxxxxxx; >gthelen@xxxxxxxxxx; wschwartz@xxxxxxxxxxxxxxxxxxx; >dferguson@xxxxxxxxxxxxxxxxxxx; wbs@xxxxxxxxxxxxxxxxxxxxxx; >nifan.cxl@xxxxxxxxx; tanxiaofei <tanxiaofei@xxxxxxxxxx>; Zengtao (B) ><prime.zeng@xxxxxxxxxxxxx>; Roberto Sassu <roberto.sassu@xxxxxxxxxx>; >kangkang.shen@xxxxxxxxxxxxx; wanghuiqiang <wanghuiqiang@xxxxxxxxxx>; >Linuxarm <linuxarm@xxxxxxxxxx> >Subject: Re: [PATCH v15 13/15] cxl/memfeature: Add CXL memory device sPPR >control feature > > > >On 11/1/24 2:17 AM, shiju.jose@xxxxxxxxxx wrote: >> From: Shiju Jose <shiju.jose@xxxxxxxxxx> >> >> Post Package Repair (PPR) maintenance operations may be supported by >> CXL devices that implement CXL.mem protocol. A PPR maintenance >> operation requests the CXL device to perform a repair operation on its media. >> For example, a CXL device with DRAM components that support PPR >> features may implement PPR Maintenance operations. DRAM components >may >> support two types of PPR: Hard PPR (hPPR), for a permanent row repair, >> and Soft PPR (sPPR), for a temporary row repair. sPPR is much faster >> than hPPR, but the repair is lost with a power cycle. >> [...] >> +enum cxl_ppr_param { >> + CXL_PPR_PARAM_DO_QUERY, >> + CXL_PPR_PARAM_DO_PPR, >> +}; >> + >> +/* See CXL rev 3.1 @8.2.9.7.2.1 Table 8-113 sPPR Feature Readable >> +Attributes */ >> +/* See CXL rev 3.1 @8.2.9.7.2.2 Table 8-116 hPPR Feature Readable >Attributes */ >> +#define CXL_MEMDEV_PPR_QUERY_RESOURCE_FLAG BIT(0) > >Are all the extra spaces after #define intended? Fixed. > >DJ > >> + >> +#define CXL_MEMDEV_PPR_DEVICE_INITIATED_MASK BIT(0) #define [...] >> +feat_sppr_done: >> return edac_dev_register(&cxlmd->dev, cxl_dev_name, NULL, >> num_ras_features, ras_features); } > Thanks, Shiju