On Tue, Aug 27, 2024 at 5:51 PM Jason Gunthorpe <jgg@xxxxxxxxxx> wrote: > > From: Nicolin Chen <nicolinc@xxxxxxxxxx> > > ACPICA commit c4f5c083d24df9ddd71d5782c0988408cf0fc1ab > > The IORT spec, Issue E.f (April 2024), adds a new CANWBS bit to the Memory > Access Flag field in the Memory Access Properties table, mainly for a PCI > Root Complex. > > This CANWBS defines the coherency of memory accesses to be not marked IOWB > cacheable/shareable. Its value further implies the coherency impact from a > pair of mismatched memory attributes (e.g. in a nested translation case): > 0x0: Use of mismatched memory attributes for accesses made by this > device may lead to a loss of coherency. > 0x1: Coherency of accesses made by this device to locations in > Conventional memory are ensured as follows, even if the memory > attributes for the accesses presented by the device or provided by > the SMMU are different from Inner and Outer Write-back cacheable, > Shareable. > > Link: https://github.com/acpica/acpica/commit/c4f5c083 > Signed-off-by: Nicolin Chen <nicolinc@xxxxxxxxxx> > Signed-off-by: Jason Gunthorpe <jgg@xxxxxxxxxx> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx> > --- > include/acpi/actbl2.h | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/include/acpi/actbl2.h b/include/acpi/actbl2.h > index e27958ef82642f..9a7acf403ed3c8 100644 > --- a/include/acpi/actbl2.h > +++ b/include/acpi/actbl2.h > @@ -453,7 +453,7 @@ struct acpi_table_ccel { > * IORT - IO Remapping Table > * > * Conforms to "IO Remapping Table System Software on ARM Platforms", > - * Document number: ARM DEN 0049E.e, Sep 2022 > + * Document number: ARM DEN 0049E.f, Apr 2024 > * > ******************************************************************************/ > > @@ -524,6 +524,7 @@ struct acpi_iort_memory_access { > > #define ACPI_IORT_MF_COHERENCY (1) > #define ACPI_IORT_MF_ATTRIBUTES (1<<1) > +#define ACPI_IORT_MF_CANWBS (1<<2) > > /* > * IORT node specific subtables > -- > 2.46.0 > >
