On Tue, Jun 25, 2024 at 02:56:22PM -0500, Avadhut Naik wrote: > AMD's Scalable MCA systems viz. Genoa will include two new registers: "viz."? Not a lot of people outside of AMD know what Genoa is. Zen4 is probably a lot more widespread. > MCA_SYND1 and MCA_SYND2. > > These registers will include supplemental error information in addition > to the existing MCA_SYND register. The data within the registers is > considered valid if MCA_STATUS[SyndV] is set.
