Update EINJ kernel document to include how to inject CXL protocol error types, build the kernel to include CXL error types, and give an example injection. Signed-off-by: Ben Cheatham <Benjamin.Cheatham@xxxxxxx> --- .../firmware-guide/acpi/apei/einj.rst | 21 +++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/Documentation/firmware-guide/acpi/apei/einj.rst b/Documentation/firmware-guide/acpi/apei/einj.rst index d6b61d22f525..23741ec0de75 100644 --- a/Documentation/firmware-guide/acpi/apei/einj.rst +++ b/Documentation/firmware-guide/acpi/apei/einj.rst @@ -181,6 +181,27 @@ You should see something like this in dmesg:: [22715.834759] EDAC sbridge MC3: PROCESSOR 0:306e7 TIME 1422553404 SOCKET 0 APIC 0 [22716.616173] EDAC MC3: 1 CE memory read error on CPU_SrcID#0_Channel#0_DIMM#0 (channel:0 slot:0 page:0x12345 offset:0x0 grain:32 syndrome:0x0 - area:DRAM err_code:0001:0090 socket:0 channel_mask:1 rank:0) +CXL error types are supported from ACPI 6.5 onwards (given a CXL port +is present). These error types are not available in the legacy interface +at /sys/kernel/debug/apei/einj, and are instead at /sys/kernel/debug/cxl/. +There is a file under debug/cxl called "einj_type" that is analogous to +available_error_type under debug/cxl. There is also a "einj_inject" file +in each $dport_dev directory under debug/cxl that will inject a given error +into the dport represented by $dport_dev. + +For example, to inject a CXL.mem protocol correctable error into +$dport_dev=pci0000:0c:: + + # cd /sys/kernel/debug/cxl/ + # cat einj_type # See which error can be injected + 0x00008000 CXL.mem Protocol Correctable + 0x00010000 CXL.mem Protocol Uncorrectable non-fatal + 0x00020000 CXL.mem Protocol Uncorrectable fatal + # cd 0000:e0:01.1 # Navigate to dport to inject into + # echo 0x8000 > einj_inject # Inject error + +To use CXL error types, ``CONFIG_ACPI_APEI_CXL_EINJ`` will need to be enabled. + Special notes for injection into SGX enclaves: There may be a separate BIOS setup option to enable SGX injection. -- 2.34.1
