On 1/16/24 6:06 PM, Dan Williams wrote:
> Ben Cheatham wrote:
>> Implement CXL helper functions in the EINJ module for getting/injecting
>> available CXL protocol error types and export them to sysfs under
>> kernel/debug/cxl.
>>
>> The kernel/debug/cxl/einj_types file will print the available CXL
>> protocol errors in the same format as the available_error_types
>> file provided by the EINJ module. The
>> kernel/debug/cxl/$dport_dev/einj_inject is functionally the same as the
>> error_type and error_inject files provided by the EINJ module, i.e.:
>> writing an error type into $dport_dev/einj_inject will inject said error
>> type into the CXL dport represented by $dport_dev.
>>
>> Signed-off-by: Ben Cheatham <Benjamin.Cheatham@xxxxxxx>
>> ---
>> Documentation/ABI/testing/debugfs-cxl | 22 ++++
>> drivers/acpi/apei/einj.c | 144 ++++++++++++++++++++++++--
>> drivers/cxl/core/port.c | 39 +++++++
>> include/linux/einj-cxl.h | 42 ++++++++
>> 4 files changed, 237 insertions(+), 10 deletions(-)
>> create mode 100644 include/linux/einj-cxl.h
>>
>> diff --git a/Documentation/ABI/testing/debugfs-cxl b/Documentation/ABI/testing/debugfs-cxl
>> index fe61d372e3fa..bcd985cca66a 100644
>> --- a/Documentation/ABI/testing/debugfs-cxl
>> +++ b/Documentation/ABI/testing/debugfs-cxl
>> @@ -33,3 +33,25 @@ Description:
>> device cannot clear poison from the address, -ENXIO is returned.
>> The clear_poison attribute is only visible for devices
>> supporting the capability.
>> +
>> +What: /sys/kernel/debug/cxl/einj_types
>> +Date: January, 2024
>> +KernelVersion: v6.9
>> +Contact: linux-cxl@xxxxxxxxxxxxxxx
>> +Description:
>> + (RO) Prints the CXL protocol error types made available by
>> + the platform in the format "0x<error number> <error type>".
>> + The <error number> can be written to einj_inject to inject
>> + <error type> into a chosen dport.
>> +
>> +What: /sys/kernel/debug/cxl/$dport_dev/einj_inject
>> +Date: January, 2024
>> +KernelVersion: v6.9
>> +Contact: linux-cxl@xxxxxxxxxxxxxxx
>> +Description:
>> + (WO) Writing an integer to this file injects the corresponding
>> + CXL protocol error into $dport_dev ($dport_dev will be a device
>> + name from /sys/bus/pci/devices). The integer to type mapping for
>> + injection can be found by reading from einj_types. If the dport
>> + was enumerated in RCH mode, a CXL 1.1 error is injected, otherwise
>> + a CXL 2.0 error is injected.
>> diff --git a/drivers/acpi/apei/einj.c b/drivers/acpi/apei/einj.c
>> index 10d51cd73fa4..c3ec03583946 100644
>> --- a/drivers/acpi/apei/einj.c
>> +++ b/drivers/acpi/apei/einj.c
>> @@ -21,6 +21,7 @@
>> #include <linux/nmi.h>
>> #include <linux/delay.h>
>> #include <linux/mm.h>
>> +#include <linux/einj-cxl.h>
>> #include <linux/platform_device.h>
>> #include <asm/unaligned.h>
>>
>> @@ -37,6 +38,12 @@
>> #define MEM_ERROR_MASK (ACPI_EINJ_MEMORY_CORRECTABLE | \
>> ACPI_EINJ_MEMORY_UNCORRECTABLE | \
>> ACPI_EINJ_MEMORY_FATAL)
>> +#define CXL_ERROR_MASK (ACPI_EINJ_CXL_CACHE_CORRECTABLE | \
>> + ACPI_EINJ_CXL_CACHE_UNCORRECTABLE | \
>> + ACPI_EINJ_CXL_CACHE_FATAL | \
>> + ACPI_EINJ_CXL_MEM_CORRECTABLE | \
>> + ACPI_EINJ_CXL_MEM_UNCORRECTABLE | \
>> + ACPI_EINJ_CXL_MEM_FATAL)
>>
>> /*
>> * ACPI version 5 provides a SET_ERROR_TYPE_WITH_ADDRESS action.
>> @@ -544,8 +551,11 @@ static int einj_error_inject(u32 type, u32 flags, u64 param1, u64 param2,
>> if (type & ACPI5_VENDOR_BIT) {
>> if (vendor_flags != SETWA_FLAGS_MEM)
>> goto inject;
>> - } else if (!(type & MEM_ERROR_MASK) && !(flags & SETWA_FLAGS_MEM))
>> + } else if (!(type & MEM_ERROR_MASK) && !(flags & SETWA_FLAGS_MEM)) {
>> goto inject;
>> + } else if ((type & CXL_ERROR_MASK) && (flags & SETWA_FLAGS_MEM)) {
>> + goto inject;
>> + }
>>
>> /*
>> * Disallow crazy address masks that give BIOS leeway to pick
>> @@ -597,6 +607,9 @@ static const char * const einj_error_type_string[] = {
>> "0x00000200\tPlatform Correctable\n",
>> "0x00000400\tPlatform Uncorrectable non-fatal\n",
>> "0x00000800\tPlatform Uncorrectable fatal\n",
>> +};
>> +
>> +static const char * const einj_cxl_error_type_string[] = {
>> "0x00001000\tCXL.cache Protocol Correctable\n",
>> "0x00002000\tCXL.cache Protocol Uncorrectable non-fatal\n",
>> "0x00004000\tCXL.cache Protocol Uncorrectable fatal\n",
>> @@ -622,29 +635,44 @@ static int available_error_type_show(struct seq_file *m, void *v)
>>
>> DEFINE_SHOW_ATTRIBUTE(available_error_type);
>>
>> -static int error_type_get(void *data, u64 *val)
>> +int einj_cxl_available_error_type_show(struct seq_file *m, void *v)
>> {
>> - *val = error_type;
>> + int cxl_err, rc;
>> + u32 available_error_type = 0;
>> +
>> + if (!einj_initialized)
>> + return -ENXIO;
>> +
>> + rc = einj_get_available_error_type(&available_error_type);
>> + if (rc)
>> + return rc;
>> +
>> + for (int pos = 0; pos < ARRAY_SIZE(einj_cxl_error_type_string); pos++) {
>> + cxl_err = ACPI_EINJ_CXL_CACHE_CORRECTABLE << pos;
>> +
>> + if (available_error_type & cxl_err)
>> + seq_puts(m, einj_cxl_error_type_string[pos]);
>> + }
>>
>> return 0;
>> }
>> +EXPORT_SYMBOL_NS_GPL(einj_cxl_available_error_type_show, CXL);
>>
>> -static int error_type_set(void *data, u64 val)
>> +static int validate_error_type(u64 type)
>> {
>> + u32 tval, vendor, available_error_type = 0;
>> int rc;
>> - u32 available_error_type = 0;
>> - u32 tval, vendor;
>>
>> /* Only low 32 bits for error type are valid */
>> - if (val & GENMASK_ULL(63, 32))
>> + if (type & GENMASK_ULL(63, 32))
>> return -EINVAL;
>>
>> /*
>> * Vendor defined types have 0x80000000 bit set, and
>> * are not enumerated by ACPI_EINJ_GET_ERROR_TYPE
>> */
>> - vendor = val & ACPI5_VENDOR_BIT;
>> - tval = val & 0x7fffffff;
>> + vendor = type & ACPI5_VENDOR_BIT;
>> + tval = type & 0x7fffffff;
>>
>> /* Only one error type can be specified */
>> if (tval & (tval - 1))
>> @@ -653,9 +681,105 @@ static int error_type_set(void *data, u64 val)
>> rc = einj_get_available_error_type(&available_error_type);
>> if (rc)
>> return rc;
>> - if (!(val & available_error_type))
>> + if (!(type & available_error_type))
>> return -EINVAL;
>> }
>> +
>> + return 0;
>> +}
>> +
>> +static int cxl_dport_get_sbdf(struct pci_dev *dport_dev, u64 *sbdf)
>> +{
>> + struct pci_bus *pbus;
>> + struct pci_host_bridge *bridge;
>> + u64 seg = 0, bus;
>> +
>> + pbus = dport_dev->bus;
>> + bridge = pci_find_host_bridge(pbus);
>> +
>> + if (!bridge)
>> + return -ENODEV;
>> +
>> + if (bridge->domain_nr != PCI_DOMAIN_NR_NOT_SET)
>> + seg = bridge->domain_nr << 24;
>> +
>> + bus = pbus->number << 16;
>> + *sbdf = seg | bus | dport_dev->devfn;
>> +
>> + return 0;
>> +}
>> +
>> +int einj_cxl_inject_rch_error(u64 rcrb, u64 type)
>> +{
>> + u64 param1 = 0, param2 = 0, param4 = 0;
>> + u32 flags;
>> + int rc;
>> +
>> + if (!einj_initialized)
>> + return -ENXIO;
>> +
>> + /* Only CXL error types can be specified */
>> + if (type & ~CXL_ERROR_MASK || (type & ACPI5_VENDOR_BIT))
>> + return -EINVAL;
>> +
>> + rc = validate_error_type(type);
>> + if (rc)
>> + return rc;
>> +
>> + param1 = (u64) rcrb;
>> + param2 = 0xfffffffffffff000;
>> + flags = 0x2;
>> +
>> + return einj_error_inject(type, flags, param1, param2, 0, param4);
>> +}
>> +EXPORT_SYMBOL_NS_GPL(einj_cxl_inject_rch_error, CXL);
>> +
>> +int einj_cxl_inject_error(struct pci_dev *dport, u64 type)
>> +{
>> + u64 param1 = 0, param2 = 0, param4 = 0;
>> + u32 flags;
>> + int rc;
>> +
>> + if (!einj_initialized)
>> + return -ENXIO;
>> +
>> + /* Only CXL error types can be specified */
>> + if (type & ~CXL_ERROR_MASK || (type & ACPI5_VENDOR_BIT))
>> + return -EINVAL;
>> +
>> + rc = validate_error_type(type);
>> + if (rc)
>> + return rc;
>> +
>> + rc = cxl_dport_get_sbdf(dport, ¶m4);
>> + if (rc)
>> + return rc;
>> +
>> + flags = 0x4;
>> +
>> + return einj_error_inject(type, flags, param1, param2, 0, param4);
>> +}
>> +EXPORT_SYMBOL_NS_GPL(einj_cxl_inject_error, CXL);
>> +
>> +static int error_type_get(void *data, u64 *val)
>> +{
>> + *val = error_type;
>> +
>> + return 0;
>> +}
>> +
>> +static int error_type_set(void *data, u64 val)
>> +{
>> + int rc;
>> +
>> + /* CXL error types have to be injected from cxl debugfs */
>> + if (val & CXL_ERROR_MASK && !(val & ACPI5_VENDOR_BIT))
>> + return -EINVAL;
>> +
>> + rc = validate_error_type(val);
>> + if (rc)
>> + return rc;
>> +
>> error_type = val;
>>
>> return 0;
>> diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
>> index 8c00fd6be730..a41618ce380b 100644
>> --- a/drivers/cxl/core/port.c
>> +++ b/drivers/cxl/core/port.c
>> @@ -3,6 +3,7 @@
>> #include <linux/platform_device.h>
>> #include <linux/memregion.h>
>> #include <linux/workqueue.h>
>> +#include <linux/einj-cxl.h>
>> #include <linux/debugfs.h>
>> #include <linux/device.h>
>> #include <linux/module.h>
>> @@ -797,6 +798,37 @@ static int cxl_dport_setup_regs(struct device *host, struct cxl_dport *dport,
>> return rc;
>> }
>>
>> +DEFINE_SHOW_ATTRIBUTE(einj_cxl_available_error_type);
>> +
>> +static int cxl_einj_inject(void *data, u64 type)
>> +{
>> + struct cxl_dport *dport = data;
>> +
>> + if (dport->rch)
>> + return einj_cxl_inject_rch_error(dport->rcrb.base, type);
>> +
>> + return einj_cxl_inject_error(to_pci_dev(dport->dport_dev), type);
>> +}
>> +DEFINE_DEBUGFS_ATTRIBUTE(cxl_einj_inject_fops, NULL, cxl_einj_inject, "%llx\n");
>> +
>> +static void cxl_debugfs_create_dport_dir(struct cxl_dport *dport)
>> +{
>> + struct dentry *dir;
>> +
>> + /*
>> + * dport_dev needs to be a PCIe port for CXL 2.0+ ports because
>> + * EINJ expects a dport SBDF to be specified for 2.0 error injection.
>> + */
>> + if (!IS_ENABLED(CONFIG_CXL_EINJ) ||
>> + (!dport->rch && !dev_is_pci(dport->dport_dev)))
>> + return;
>
> Perhaps this IS_ENABLED(CONFIG_CXL_EINJ) and the one below should be
> replace with a helper that also queries einj_initialized? Such a helper
> would naturally have a static inline stub that fails in the
> CONFIG_CXL_EINJ=n case, and it otherwise behaves the same as the base
> ACPI case where the debugfs files do not appear if init fails.
Ok, I'll add that in.
