On Tue, Sep 05, 2023 at 09:51:14AM +0800, Meng Li wrote:
> +static void amd_pstate_update_highest_perf(unsigned int cpu)
> +{
> + struct cpufreq_policy *policy;
> + struct amd_cpudata *cpudata;
> + u32 prev_high = 0, cur_high = 0;
> + u64 highest_perf;
> + int ret;
> +
> + if (!prefcore)
> + return;
> +
> + ret = amd_pstate_get_highest_perf(cpu, &highest_perf);
> + if (ret)
> + return;
> +
> + policy = cpufreq_cpu_get(cpu);
> + cpudata = policy->driver_data;
> + cur_high = highest_perf;
> + prev_high = READ_ONCE(cpudata->cppc_highest_perf);
> +
> + if (prev_high != cur_high) {
> + WRITE_ONCE(cpudata->cppc_highest_perf, cur_high);
> + sched_set_itmt_core_prio(cur_high, cpu);
I just noticed, your cur_high is explicitly 'u32', but
sched_set_itmt_core_prio() and the rest of the scheduler use 'int' (aka
s32). If you somehow get that top bit set things might not work out as
expected.
Please double check.
> + }
> +
> + cpufreq_cpu_put(policy);
> +}
