v3 Changes: - Add sysfs files for finding valid CXL 1.1 downstream port MMIO addresses, along with validation of said addresses - Update EINJ documentation to include relevant information for injecting CXL error types - Dropped Yazen's from tag This patch is a follow up to the discussion at [1], and builds on Tony's CXL error patch at [2]. The new CXL error types will use the Memory Address field in the SET_ERROR_TYPE_WITH_ADDRESS structure in order to target a CXL 1.1 compliant memory-mapped downstream port. The value of the memory address will be in the port's MMIO range, and it will not represent physical (normal or persistent) memory. In v2 [3], the user supplied the MMIO address for the downstream port, but per Dan Williams' suggestion [3], the addresses are predetermined and the user only picks the error type to inject and the downstream port to inject into. In order to inject an error, the user write the error type to the error_type file under the einj debugfs directory, then writes any integer into one of the files under the cxl directory. [1]: Link: https://lore.kernel.org/linux-acpi/20221206205234.606073-1-Benjamin.Cheatham@xxxxxxx/ [2]: Link: https://lore.kernel.org/linux-cxl/CAJZ5v0hNQUfWViqxbJ5B4JCGJUuHpWWSpqpCFWPNpGuagoFbsQ@xxxxxxxxxxxxxx/T/#t [3]: Link: https://lore.kernel.org/linux-cxl/20230403151849.43408-1-Benjamin.Cheatham@xxxxxxx/ Ben Cheatham (3): CXL, PCIE: Add cxl_rcrb_addr file to dport_dev ACPI, APEI, EINJ: Add CXL 1.1 EINJ error type support ACPI, APEI, EINJ: Update EINJ documentation Documentation/ABI/testing/sysfs-bus-cxl | 8 +++ .../firmware-guide/acpi/apei/einj.rst | 26 ++++++++-- drivers/acpi/apei/einj.c | 26 +++++++++- drivers/cxl/acpi.c | 2 + drivers/cxl/core/port.c | 50 +++++++++++++++++++ drivers/cxl/cxl.h | 3 ++ include/linux/cxl.h | 18 +++++++ 7 files changed, 128 insertions(+), 5 deletions(-) create mode 100644 include/linux/cxl.h -- 2.34.1
