On Wed, Apr 05, 2023 at 05:48:47PM +0200, Andrew Jones wrote:
> On Tue, Apr 04, 2023 at 11:50:29PM +0530, Sunil V L wrote:
> > Add support for initializing the RISC-V INTC driver on ACPI
> > platforms.
> >
> > Signed-off-by: Sunil V L <sunilvl@xxxxxxxxxxxxxxxx>
> > Acked-by: Rafael J. Wysocki <rafael.j.wysocki@xxxxxxxxx>
> > Reviewed-by: Andrew Jones <ajones@xxxxxxxxxxxxxxxx>
> > Reviewed-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
> > ---
> > drivers/irqchip/irq-riscv-intc.c | 74 ++++++++++++++++++++++++++------
> > 1 file changed, 61 insertions(+), 13 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
> > index f229e3e66387..6b476fa356c0 100644
> > --- a/drivers/irqchip/irq-riscv-intc.c
> > +++ b/drivers/irqchip/irq-riscv-intc.c
> > @@ -6,6 +6,7 @@
> > */
> >
> > #define pr_fmt(fmt) "riscv-intc: " fmt
> > +#include <linux/acpi.h>
> > #include <linux/atomic.h>
> > #include <linux/bits.h>
> > #include <linux/cpu.h>
> > @@ -112,6 +113,30 @@ static struct fwnode_handle *riscv_intc_hwnode(void)
> > return intc_domain->fwnode;
> > }
> >
> > +static int __init riscv_intc_init_common(struct fwnode_handle *fn)
> > +{
> > + int rc;
> > +
> > + intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG,
> > + &riscv_intc_domain_ops, NULL);
> > + if (!intc_domain) {
> > + pr_err("unable to add IRQ domain\n");
> > + return -ENXIO;
> > + }
> > +
> > + rc = set_handle_irq(&riscv_intc_irq);
> > + if (rc) {
> > + pr_err("failed to set irq handler\n");
> > + return rc;
> > + }
> > +
> > + riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
> > +
> > + pr_info("%d local interrupts mapped\n", BITS_PER_LONG);
> > +
> > + return 0;
> > +}
> > +
> > static int __init riscv_intc_init(struct device_node *node,
> > struct device_node *parent)
> > {
> > @@ -133,24 +158,47 @@ static int __init riscv_intc_init(struct device_node *node,
> > if (riscv_hartid_to_cpuid(hartid) != smp_processor_id())
> > return 0;
> >
> > - intc_domain = irq_domain_add_linear(node, BITS_PER_LONG,
> > - &riscv_intc_domain_ops, NULL);
> > - if (!intc_domain) {
> > - pr_err("unable to add IRQ domain\n");
> > - return -ENXIO;
> > - }
> > -
> > - rc = set_handle_irq(&riscv_intc_irq);
> > + rc = riscv_intc_init_common(of_node_to_fwnode(node));
> > if (rc) {
> > - pr_err("failed to set irq handler\n");
> > + pr_err("failed to initialize INTC\n");
>
> The ACPI version doesn't output this error when riscv_intc_init_common()
> fails. It should probably be consistent. Either removing it here, if the
> errors output within riscv_intc_init_common() are sufficient, or adding
> it to the ACPI version.
>
> > return rc;
> > }
> >
> > - riscv_set_intc_hwnode_fn(riscv_intc_hwnode);
> > -
> > - pr_info("%d local interrupts mapped\n", BITS_PER_LONG);
> > -
> > return 0;
> > }
> >
> > IRQCHIP_DECLARE(riscv, "riscv,cpu-intc", riscv_intc_init);
> > +
> > +#ifdef CONFIG_ACPI
> > +
> > +static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header,
> > + const unsigned long end)
> > +{
> > + int rc;
> > + struct fwnode_handle *fn;
> > + struct acpi_madt_rintc *rintc;
> > +
> > + rintc = (struct acpi_madt_rintc *)header;
> > +
> > + /*
> > + * The ACPI MADT will have one INTC for each CPU (or HART)
> > + * so riscv_intc_acpi_init() function will be called once
> > + * for each INTC. We only do INTC initialization
> > + * for the INTC belonging to the boot CPU (or boot HART).
> > + */
> > + if (riscv_hartid_to_cpuid(rintc->hart_id) != smp_processor_id())
> > + return 0;
> > +
> > + fn = irq_domain_alloc_named_fwnode("RISCV-INTC");
> > + if (!fn) {
> > + pr_err("unable to allocate INTC FW node\n");
> > + return -ENOMEM;
> > + }
> > +
> > + rc = riscv_intc_init_common(fn);
> > + return rc;
>
> nit: If we don't add the error message here, then rc can be removed and we
> can just do
>
> return riscv_intc_init_common(fn);
>
> And, if we remove the error above, then we reduce the return there too.
>
Make sense. Thanks!. Will update in next revision.
Thanks,
Sunil
