On Mon, 06 Feb 2023 13:51:55 -0700
Dave Jiang <dave.jiang@xxxxxxxxx> wrote:
> Match the DPA ranges of the mem device and the calcuated DPA range attached
> to the DSMAS. If a match is found, then assign the QTG ID to the relevant
> DPA range of the memory device.
>
> Signed-off-by: Dave Jiang <dave.jiang@xxxxxxxxx>
> ---
> drivers/cxl/core/mbox.c | 2 ++
> drivers/cxl/cxlmem.h | 2 ++
> drivers/cxl/port.c | 35 +++++++++++++++++++++++++++++++++++
> 3 files changed, 39 insertions(+)
>
> diff --git a/drivers/cxl/core/mbox.c b/drivers/cxl/core/mbox.c
> index b03fba212799..2a7b07d65010 100644
> --- a/drivers/cxl/core/mbox.c
> +++ b/drivers/cxl/core/mbox.c
> @@ -869,6 +869,8 @@ struct cxl_dev_state *cxl_dev_state_create(struct device *dev)
>
> mutex_init(&cxlds->mbox_mutex);
> cxlds->dev = dev;
> + cxlds->pmem_qtg_id = -1;
> + cxlds->ram_qtg_id = -1;
>
> return cxlds;
> }
> diff --git a/drivers/cxl/cxlmem.h b/drivers/cxl/cxlmem.h
> index ab138004f644..d88b88ecc807 100644
> --- a/drivers/cxl/cxlmem.h
> +++ b/drivers/cxl/cxlmem.h
> @@ -251,6 +251,8 @@ struct cxl_dev_state {
> struct resource dpa_res;
> struct resource pmem_res;
> struct resource ram_res;
> + int pmem_qtg_id;
> + int ram_qtg_id;
> u64 total_bytes;
> u64 volatile_only_bytes;
> u64 persistent_only_bytes;
> diff --git a/drivers/cxl/port.c b/drivers/cxl/port.c
> index 6b2ad22487f5..c4cee69d6625 100644
> --- a/drivers/cxl/port.c
> +++ b/drivers/cxl/port.c
> @@ -68,6 +68,39 @@ static int cxl_port_qos_calculate(struct cxl_port *port)
> return 0;
> }
>
> +static bool dpa_match_qtg_range(struct range *dpa, struct range *qtg)
> +{
> + if (dpa->start >= qtg->start && dpa->end <= qtg->end)
> + return true;
> + return false;
return dpa->start >= qtg->start && dpa->end <= qtg-end;
> +}
> +
> +static void cxl_dev_set_qtg(struct cxl_port *port, struct cxl_dev_state *cxlds)
> +{
> + struct dsmas_entry *dent;
> + struct range ram_range = {
> + .start = cxlds->ram_res.start,
> + .end = cxlds->ram_res.end,
> + };
> + struct range pmem_range = {
> + .start = cxlds->pmem_res.start,
> + .end = cxlds->pmem_res.end,
> + };
> +
> + mutex_lock(&port->cdat.dsmas_lock);
> + list_for_each_entry(dent, &port->cdat.dsmas_list, list) {
> + if (dpa_match_qtg_range(&ram_range, &dent->dpa_range)) {
> + cxlds->ram_qtg_id = dent->qtg_id;
> + break;
> + }
> + if (dpa_match_qtg_range(&pmem_range, &dent->dpa_range)) {
> + cxlds->pmem_qtg_id = dent->qtg_id;
Could be multiple ranges in ram and pmem. I guess we can leave that for
future work.
> + break;
> + }
> + }
> + mutex_unlock(&port->cdat.dsmas_lock);
> +}
> +
> static int cxl_port_probe(struct device *dev)
> {
> struct cxl_port *port = to_cxl_port(dev);
> @@ -134,6 +167,8 @@ static int cxl_port_probe(struct device *dev)
> rc = cxl_mem_create_range_info(cxlds);
> if (rc)
> return rc;
> +
> + cxl_dev_set_qtg(port, cxlds);
> }
>
> rc = devm_cxl_enumerate_decoders(cxlhdm);
>
>
