On 10/21/22 17:39, Dan Williams wrote: > Terry Bowman wrote: >> ACPI includes a CXL _OSC support method to communicate the available >> CXL support to FW. The CXL support _OSC includes a field to indicate >> CXL1.1 RCH RCD support. The OS sets this bit to 1 if it supports access >> to RCD and RCH Port registers.[1] FW can potentially change it's operation >> depending on the _OSC support setting reported by the OS. >> >> The ACPI driver does not currently set the ACPI _OSC support to indicate >> CXL1.1 RCD RCH support. Change the capability reported to include CXL1.1. >> >> [1] CXL3.0 Table 9-26 'Interpretation of CXL _OSC Support Field' >> >> Signed-off-by: Terry Bowman <terry.bowman@xxxxxxx> >> --- >> drivers/acpi/pci_root.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c >> index c8385ef54c37..094a59b216ae 100644 >> --- a/drivers/acpi/pci_root.c >> +++ b/drivers/acpi/pci_root.c > > Be sure to copy linux-acpi@xxxxxxxxxxxxxxx on patches that touch > drivers/acpi/ > Ok, I will. Regards, Terry >> @@ -492,6 +492,7 @@ static u32 calculate_cxl_support(void) >> u32 support; >> >> support = OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT; >> + support |= OSC_CXL_1_1_PORT_REG_ACCESS_SUPPORT; >> if (pci_aer_available()) >> support |= OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT; >> if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)) > > This looks good to me though.