On Wed, Oct 12, 2022 at 12:04:57PM +0000, Justin He wrote:
> I have a concern about what if cmpxchg failed? Do we have to still
> guarantee the ordering since cmpxchg will not imply a smp_mb if it
> failed.
Of course it will imply that. At least on x86 it does. smp_wmb() is a
compiler barrier there and cmpxchg() already has that barrier semantics
by clobbering "memory". I'm pretty sure you should have the same thing
on ARM.
And even if that weren't the case, the write barrier is, as the comment
says, "new_cache must be put into array after its contents are written".
Are we writing anything into the cache if cmpxchg fails?
> Besides, I didn't find the paired smp_mb or smp_rmb for this smp_wmb.
Why would there be pairs? I don't understand that statement here.
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
