RE: [PATCH v2 1/2] gpio: mlxbf2: Introduce IRQ support

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> > +static int
> > +mlxbf2_gpio_irq_set_type(struct irq_data *irqd, unsigned int type) 
> > +{
> > +
> > +	switch (type & IRQ_TYPE_SENSE_MASK) {
> > +	case IRQ_TYPE_EDGE_BOTH:
> > +		fall = true;
> > +		rise = true;
> > +		break;
> > +	case IRQ_TYPE_EDGE_RISING:
> > +		rise = true;
> > +		break;
> > +	case IRQ_TYPE_EDGE_FALLING:
> > +		fall = true;
> > +		break;
> > +	default:
> > +		return -EINVAL;
> > +	}
> 
> > What PHY are you using? I think every one i've looked at are level 
> > triggered, not edge. Using an edge interrupt might work 99% of the 
> > time, but when the timing is just wrong, you can loose an interrupt.
> > Which might mean phylib thinks the link is down, when it fact it is up. 
> > You will need to unplug and replug to recover from that.
> 
> It is the micrel PHY KSZ9031 so it is an active low level interrupt.
> Here, IRQ_TYPE_EDGE* macros are mainly used to decide whether to write 
> the YU_GPIO_CAUSE_FALL_EN register vs the YU_GPIO_CAUSE_RISE_EN register.
> These 2 registers are used in both LEVEL/EDGE interrupts.

> I assume you also have an YU_GPIO_CAUSE_LOW_EN and

> YU_GPIO_CAUSE_HIGH_EN registers? These registers need to

> be set for IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_LEVEL_HIGH.

No we don't. I double checked with the HW team and they confirmed that
YU_GPIO_CAUSE_FALL_EN and YU_GPIO_CAUSE_RISE_EN are used in
Both level and edge interrupts cases.

Thanks.
Asnaa




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