On Tue, Aug 24, 2021 at 2:21 PM Joerg Roedel <joro@xxxxxxxxxx> wrote:
>
> From: Joerg Roedel <jroedel@xxxxxxx>
>
> These masks are only used internally in the PCI Host Bridge _OSC
> negotiation code, which already makes sure nothing outside of these
> masks is set. Remove the masks and simplify the code.
>
> Suggested-by: Bjorn Helgaas <helgass@xxxxxxxxxx>
> Signed-off-by: Joerg Roedel <jroedel@xxxxxxx>
Reviewed-by: Rafael J. Wysocki <rafael@xxxxxxxxxx>
> ---
> drivers/acpi/pci_root.c | 9 +++------
> include/linux/acpi.h | 2 --
> 2 files changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
> index d7deedf3548e..0c3030a58219 100644
> --- a/drivers/acpi/pci_root.c
> +++ b/drivers/acpi/pci_root.c
> @@ -199,18 +199,15 @@ static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
> acpi_status status;
> u32 result, capbuf[3];
>
> - support &= OSC_PCI_SUPPORT_MASKS;
> support |= root->osc_support_set;
>
> capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
> capbuf[OSC_SUPPORT_DWORD] = support;
> - if (control) {
> - *control &= OSC_PCI_CONTROL_MASKS;
> + if (control)
> capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
> - } else {
> + else
> /* Run _OSC query only with existing controls. */
> capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
> - }
>
> status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
> if (ACPI_SUCCESS(status)) {
> @@ -357,7 +354,7 @@ static acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 r
> if (!mask)
> return AE_BAD_PARAMETER;
>
> - ctrl = *mask & OSC_PCI_CONTROL_MASKS;
> + ctrl = *mask;
> if ((ctrl & req) != req)
> return AE_TYPE;
>
> diff --git a/include/linux/acpi.h b/include/linux/acpi.h
> index 72e4f7fd268c..c6dba5f21384 100644
> --- a/include/linux/acpi.h
> +++ b/include/linux/acpi.h
> @@ -577,7 +577,6 @@ extern u32 osc_sb_native_usb4_control;
> #define OSC_PCI_MSI_SUPPORT 0x00000010
> #define OSC_PCI_EDR_SUPPORT 0x00000080
> #define OSC_PCI_HPX_TYPE_3_SUPPORT 0x00000100
> -#define OSC_PCI_SUPPORT_MASKS 0x0000019f
>
> /* PCI Host Bridge _OSC: Capabilities DWORD 3: Control Field */
> #define OSC_PCI_EXPRESS_NATIVE_HP_CONTROL 0x00000001
> @@ -587,7 +586,6 @@ extern u32 osc_sb_native_usb4_control;
> #define OSC_PCI_EXPRESS_CAPABILITY_CONTROL 0x00000010
> #define OSC_PCI_EXPRESS_LTR_CONTROL 0x00000020
> #define OSC_PCI_EXPRESS_DPC_CONTROL 0x00000080
> -#define OSC_PCI_CONTROL_MASKS 0x000000bf
>
> #define ACPI_GSB_ACCESS_ATTRIB_QUICK 0x00000002
> #define ACPI_GSB_ACCESS_ATTRIB_SEND_RCV 0x00000004
> --
> 2.32.0
>
