Re: [PATCH v5 1/6] cxl/acpi: Local definition of ACPICA infrastructure

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On Sun, Jun 6, 2021 at 8:05 AM Dan Williams <dan.j.williams@xxxxxxxxx> wrote:
>
> The recently released CXL specification change (ECN) for the CXL Fixed
> Memory Window Structure (CFMWS) extension to the CXL Early Discovery
> Table (CEDT) enables a large amount of functionality. It defines the
> root of a CXL memory topology and is needed for all OS flows for CXL
> provisioning CXL memory expanders. For ease of merging and tree
> management add the new ACPI definition locally (drivers/cxl/acpi.h) in
> such a way that they will not collide with the eventual arrival of the
> definitions through the ACPICA project to their final location
> (drivers/acpi/actbl1.h).

I've just applied the ACPICA series including this change which can be
made available as a forward-only branch in my tree, if that helps.

> The definitions in drivers/cxl/acpi.h can be dropped post -rc1.
>
> Cc: "Rafael J. Wysocki" <rjw@xxxxxxxxxxxxx>
> Co-developed-by: Alison Schofield <alison.schofield@xxxxxxxxx>
> Co-developed-by: Erik Kaneda <erik.kaneda@xxxxxxxxx>
> Signed-off-by: Alison Schofield <alison.schofield@xxxxxxxxx>
> Signed-off-by: Erik Kaneda <erik.kaneda@xxxxxxxxx>
> Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx>
> ---
>  drivers/cxl/acpi.h |   48 ++++++++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 drivers/cxl/acpi.h
>
> diff --git a/drivers/cxl/acpi.h b/drivers/cxl/acpi.h
> new file mode 100644
> index 000000000000..1482c19e7227
> --- /dev/null
> +++ b/drivers/cxl/acpi.h
> @@ -0,0 +1,48 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/* Copyright(c) 2021 Intel Corporation. */
> +#ifndef __CXL_ACPI_H__
> +#define __CXL_ACPI_H__
> +
> +#ifndef ACPI_CEDT_CHBS_VERSION_CXL20
> +/*
> + * NOTE: These definitions are temporary and to be deleted in v5.14-rc1
> + * when the identical definitions become available from
> + * include/acpi/actbl1.h.
> + */
> +
> +#define ACPI_CEDT_TYPE_CFMWS 1
> +#define ACPI_CEDT_TYPE_RESERVED 2
> +
> +#define ACPI_CEDT_CHBS_VERSION_CXL11 (0)
> +#define ACPI_CEDT_CHBS_VERSION_CXL20 (1)
> +
> +#define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000)
> +#define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000)
> +
> +struct acpi_cedt_cfmws {
> +       struct acpi_cedt_header header;
> +       u32 reserved1;
> +       u64 base_hpa;
> +       u64 window_size;
> +       u8 interleave_ways;
> +       u8 interleave_arithmetic;
> +       u16 reserved2;
> +       u32 granularity;
> +       u16 restrictions;
> +       u16 qtg_id;
> +       u32 interleave_targets[];
> +};
> +
> +/* Values for Interleave Arithmetic field above */
> +
> +#define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0)
> +
> +/* Values for Restrictions field above */
> +
> +#define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1)
> +#define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1 << 1)
> +#define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1 << 2)
> +#define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1 << 3)
> +#define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1 << 4)
> +#endif /* ACPI_CEDT_CHBS_VERSION_CXL20 */
> +#endif /* __CXL_ACPI_H__ */
>



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