On Fri, 7 May 2021 18:10:13 -0500
Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote:
Thanks. All updates as per your comments.
> > +static int pci_doe_register(struct pci_doe *doe)
> > +{
> > + struct pci_dev *pdev = doe->pdev;
> > + bool poll = !pci_dev_msi_enabled(pdev);
> > + int rc, irq;
> > + u32 val;
> > +
> > + pci_read_config_dword(pdev, doe->cap + PCI_DOE_CAP, &val);
> > +
> > + if (!poll && FIELD_GET(PCI_DOE_CAP_INT, val)) {
> > + irq = pci_irq_vector(pdev, FIELD_GET(PCI_DOE_CAP_IRQ, val));
> > + if (irq < 0)
> > + return irq;
> > +
> > + rc = request_irq(irq, pci_doe_irq, 0, "DOE", doe);
>
> I expect there may be many devices with DOE. Do you want some
> device identification here? E.g., on my system I see things like this
> in /proc/interrupts:
>
> dmar0
> nvme0q0
> snd_hda_intel:card0
> ahci[0000:00:17.0]
Good point. For this I've currently gone with
DOE[0000:00:81.0]_160
DOE[0000:00:81.0]_190
etc as a single function can have multiple DOE instances
and the easiest way to distinguish them is the offset at
which the capability is found in config space of the device.
I'm open to other suggestions.
Jonathan
