On Thu, 2006-04-20 at 19:14 -0400, Kimball Murray wrote: > Our system uses an ACPI Interrupt Source Override to inform the OS > that the > 8254 timer (IRQ0) is on pin 1 of the ioapic. On that same ioapic, pin > 0 > handles an interrupt from a PCI device. The work-around for the VIA > chipset > now causes pin 0 to get IRQ0 on our platform, which the timer also > claims. > The sad result is both pins 0 and 1 drive IRQ0, but pins 0 and 1 have > different triggering characterists (and polarity), so time learches > forward > in an IRQ0 interrupt storm. And how I now if my via motherboard suffers this problem ? Could be something like this messages : Losing some ticks... checking if CPU frequency changed. Thanks, -- Sérgio M. B.
Attachment:
smime.p7s
Description: S/MIME cryptographic signature
