tcng issue

Linux Advanced Routing and Traffic Control

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Hi.

After migrating a tc-based script to tcc (from the tcng package), we are
having a filter issue. The script generated by tcc with tc commands is not
configuring the tc filters; "tc filter show" results in none after the
script is run, although no error message is generated from the "tc filter
add". Classes and qdiscs seem to be ok.

This is the output of tcc:

tc qdisc del dev eth1 root

# ================================ Device eth1 ================================

tc qdisc add dev eth1 handle 1:0 root htb
tc class add dev eth1 parent 1:0 classid 1:1 htb rate 16000bps burst 6144
tc class add dev eth1 parent 1:1 classid 1:2 htb rate 4000bps ceil 12000bps burst 6144 prio 1
tc qdisc add dev eth1 handle 2:0 parent 1:2 sfq perturb 10
tc class add dev eth1 parent 1:1 classid 1:3 htb rate 4000bps ceil 4000bps burst 6144 prio 1
tc qdisc add dev eth1 handle 3:0 parent 1:3 sfq perturb 10
tc class add dev eth1 parent 1:1 classid 1:4 htb rate 4000bps ceil 4000bps burst 6144 prio 1
tc qdisc add dev eth1 handle 4:0 parent 1:4 sfq perturb 10
tc class add dev eth1 parent 1:1 classid 1:5 htb rate 4000bps ceil 8000bps burst 6144 prio 2
tc qdisc add dev eth1 handle 5:0 parent 1:5 sfq perturb 10
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 1:0:0 u32 divisor 1
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 1:0:0
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 1:0:1 u32 ht 1:0:0 match u8 0x0 0x2 at 13 classid 1:2
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 2:0:0 u32 divisor 1
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 2:0:0
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 2:0:1 u32 ht 2:0:0 match u8 0x10 0x10 at 13 classid 1:2
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 3:0:0 u32 divisor 1
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 3:0:0
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 3:0:1 u32 ht 3:0:0 match u16 0x16 0xffff at 2 classid 1:2
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 match u8 0x10 0xff at 1 classid 1:2
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 4:0:0 u32 divisor 1
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 4:0:0
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 4:0:1 u32 ht 4:0:0 match u16 0x19 0xffff at 2 classid 1:3
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 5:0:0 u32 divisor 1
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 5:0:0
tc filter add dev eth1 parent 1:1 protocol all prio 1 handle 5:0:1 u32 ht 5:0:0 match u16 0x50 0xffff at 2 classid 1:4
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 classid 1:5
tc filter add dev eth1 parent 1:1 protocol all prio 1 u32 match u32 0x0 0x0 at 0 classid 1:2
tc qdisc del dev imq0 root

# ================================ Device imq0 ================================

tc qdisc add dev imq0 handle 1:0 root htb
tc class add dev imq0 parent 1:0 classid 1:1 htb rate 32000bps burst 6144
tc class add dev imq0 parent 1:1 classid 1:2 htb rate 8000bps ceil 32000bps burst 6144 prio 1
tc qdisc add dev imq0 handle 2:0 parent 1:2 sfq perturb 10
tc class add dev imq0 parent 1:1 classid 1:3 htb rate 8000bps ceil 32000bps burst 6144 prio 1
tc qdisc add dev imq0 handle 3:0 parent 1:3 sfq perturb 10
tc class add dev imq0 parent 1:1 classid 1:4 htb rate 8000bps ceil 32000bps burst 6144 prio 2
tc qdisc add dev imq0 handle 4:0 parent 1:4 sfq perturb 10
tc class add dev imq0 parent 1:1 classid 1:5 htb rate 8000bps ceil 32000bps burst 6144 prio 2
tc qdisc add dev imq0 handle 5:0 parent 1:5 sfq perturb 10
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 1:0:0 u32 divisor 1
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 1:0:0
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 1:0:1 u32 ht 1:0:0 match u8 0x0 0x2 at 13 classid 1:2
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 2:0:0 u32 divisor 1
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 2:0:0
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 2:0:1 u32 ht 2:0:0 match u8 0x10 0x10 at 13 classid 1:2
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 match u8 0x10 0xff at 1 classid 1:2
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 3:0:0 u32 divisor 1
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 3:0:0
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 3:0:1 u32 ht 3:0:0 match u16 0x19 0xffff at 2 classid 1:3
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 4:0:0 u32 divisor 1
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 4:0:0
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 4:0:1 u32 ht 4:0:0 match u16 0x16 0xffff at 2 classid 1:3
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 5:0:0 u32 divisor 1
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 5:0:0
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 5:0:1 u32 ht 5:0:0 match u16 0x16 0xffff at 0 classid 1:3
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 6:0:0 u32 divisor 1
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 6:0:0
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 6:0:1 u32 ht 6:0:0 match u16 0x50 0xffff at 0 classid 1:4
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 7:0:0 u32 divisor 1
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 offset at 0 mask 0f00 shift 6 eat link 7:0:0
tc filter add dev imq0 parent 1:1 protocol all prio 1 handle 7:0:1 u32 ht 7:0:0 match u16 0x1bb 0xffff at 0 classid 1:4
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u8 0x6 0xff at 9 classid 1:5
tc filter add dev imq0 parent 1:1 protocol all prio 1 u32 match u32 0x0 0x0 at 0 classid 1:2

Any hints ?


Rubens


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