On 31.01.2014, at 12:25, Aneesh Kumar K.V <aneesh.kumar@xxxxxxxxxxxxxxxxxx> wrote:
> Alexander Graf <agraf@xxxxxxx> writes:
>
>> On 01/28/2014 05:44 PM, Aneesh Kumar K.V wrote:
>>> Writing to IC is not allowed in the privileged mode.
>>
>> This is not a patch description.
>>
>>>
>>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@xxxxxxxxxxxxxxxxxx>
>>> ---
>>> arch/powerpc/include/asm/kvm_host.h | 1 +
>>> arch/powerpc/kvm/book3s_emulate.c | 3 +++
>>> arch/powerpc/kvm/book3s_pr.c | 2 ++
>>> 3 files changed, 6 insertions(+)
>>>
>>> diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
>>> index 9ebdd12e50a9..e0b13aca98e6 100644
>>> --- a/arch/powerpc/include/asm/kvm_host.h
>>> +++ b/arch/powerpc/include/asm/kvm_host.h
>>> @@ -509,6 +509,7 @@ struct kvm_vcpu_arch {
>>> /* Time base value when we entered the guest */
>>> u64 entry_tb;
>>> u64 entry_vtb;
>>> + u64 entry_ic;
>>> u32 tcr;
>>> ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
>>> u32 ivor[64];
>>> diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
>>> index 4b58d8a90cb5..abe6f3057e5b 100644
>>> --- a/arch/powerpc/kvm/book3s_emulate.c
>>> +++ b/arch/powerpc/kvm/book3s_emulate.c
>>> @@ -531,6 +531,9 @@ int kvmppc_core_emulate_mfspr_pr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val
>>> case SPRN_VTB:
>>> *spr_val = vcpu->arch.vtb;
>>> break;
>>> + case SPRN_IC:
>>> + *spr_val = vcpu->arch.ic;
>>> + break;
>>> case SPRN_GQR0:
>>> case SPRN_GQR1:
>>> case SPRN_GQR2:
>>> diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
>>> index b5598e9cdd09..51d469f8c9fd 100644
>>> --- a/arch/powerpc/kvm/book3s_pr.c
>>> +++ b/arch/powerpc/kvm/book3s_pr.c
>>> @@ -121,6 +121,7 @@ void kvmppc_copy_to_svcpu(struct kvmppc_book3s_shadow_vcpu *svcpu,
>>> */
>>> vcpu->arch.entry_tb = get_tb();
>>> vcpu->arch.entry_vtb = get_vtb();
>>> + vcpu->arch.entry_ic = mfspr(SPRN_IC);
>>
>> Is this implemented on all systems?
>>
>>>
>>> }
>>>
>>> @@ -174,6 +175,7 @@ out:
>>> vcpu->arch.purr += get_tb() - vcpu->arch.entry_tb;
>>> vcpu->arch.spurr += get_tb() - vcpu->arch.entry_tb;
>>> vcpu->arch.vtb += get_vtb() - vcpu->arch.entry_vtb;
>>> + vcpu->arch.ic += mfspr(SPRN_IC) - vcpu->arch.entry_ic;
>>
>> This is getting quite convoluted. How about we act slightly more fuzzy
>> and put all of this into vcpu_load/put?
>>
>
> I am not sure whether vcpu_load/put is too early/late to save these
> context ?
It'd mean we treat instruction emulation as part of guest overhead and time, but we'd make the entry/exit path faster. Unlike with HV KVM, guest entry/exit is pretty hot due to the massive amounts of instruction emulation we need to do.
Alex
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