Re: [PATCH v5] KVM: nVMX: Fully support of nested VMX preemption timer

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On Thu, Sep 26, 2013 at 07:47:33PM +0200, Paolo Bonzini wrote:
> -----BEGIN PGP SIGNED MESSAGE-----
> Hash: SHA1
> 
> Il 26/09/2013 19:19, Jan Kiszka ha scritto:
> > On 2013-09-26 17:04, Paolo Bonzini wrote:
> >> Il 16/09/2013 10:11, Arthur Chunqi Li ha scritto:
> >>> This patch contains the following two changes:
> >>> 1. Fix the bug in nested preemption timer support. If vmexit L2->L0
> >>> with some reasons not emulated by L1, preemption timer value should
> >>> be save in such exits.
> >>> 2. Add support of "Save VMX-preemption timer value" VM-Exit controls
> >>> to nVMX.
> >>>
> >>> With this patch, nested VMX preemption timer features are fully
> >>> supported.
> >>>
> >>> Signed-off-by: Arthur Chunqi Li <yzt356@xxxxxxxxx>
> >>> ---
> >>> ChangeLog to v4:
> >>> 	Format changes and remove a flag in nested_vmx.
> >>>  arch/x86/include/uapi/asm/msr-index.h |    1 +
> >>>  arch/x86/kvm/vmx.c                    |   44 +++++++++++++++++++++++++++++++--
> >>>  2 files changed, 43 insertions(+), 2 deletions(-)
> >>
> >> Hi all,
> >>
> >> the test fails for me if the preemption timer value is set to a value
> >> that is above ~2000 (which means ~65000 TSC cycles on this machine).
> >> The preemption timer seems to count faster than what is expected, for
> >> example only up to 4 million cycles if you set it to one million.
> >> So, I am leaving the patch out of kvm/queue for now, until I can
> >> test it on more processors.
> > 
> > So this behaviour is a regression of this patch (and your own version as
> > well)?
> 
> Without this patch Arthur's preemption timer test doesn't work at all.
> 
Have you ruled out test bugs?

I see things like:
+       int i, j;
...

+               // Consume enough time to let L2->L0->L2 occurs
+               for(i = 0; i < 100000; i++)
+                       for (j = 0; j < 10000; j++);

which can be optimized out. Or use of rdtsc() which can be problematic
if host tsc is not synchronised.


--
			Gleb.
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