Information of EPT violation VMEXIT

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Hi there,

When I testing EPT violation VMEXIT, I get some confusions in bit 7&8
in "Exit Qualification for EPT Violations" (Table 27-7 in SDM).

Bit 7 means "Set if the guest linear-address field is valid." In which
occasion will bit 7 clear? I don't quite understand the following
statements in SDM "The guest linear-address field is valid for all EPT
violations except those resulting from an attempt to load the guest
PDPTEs as part of the execution of the MOV CR instruction."

Bit 8 means the causes of EPT violation. But I don't understand what
it is means when set and clear. I always get the exit qualification
with this bit set, how to design a violation with this bit clear?

Thanks,
Arthur
-- 
Arthur Chunqi Li
Department of Computer Science
School of EECS
Peking University
Beijing, China
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