Re: [PATCH v7 00/15] Nested EPT

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On 08/05/2013 10:07 AM, Gleb Natapov wrote:
Xiao comment about checking ept pointer before flushing individual ept context
is addressed here.

Gleb Natapov (3):
   nEPT: make guest's A/D bits depends on guest's paging mode
   nEPT: Support shadow paging for guest paging without A/D bits
   nEPT: correctly check if remote tlb flush is needed for shadowed EPT
     tables

Nadav Har'El (10):
   nEPT: Support LOAD_IA32_EFER entry/exit controls for L1
   nEPT: Fix cr3 handling in nested exit and entry
   nEPT: Fix wrong test in kvm_set_cr3
   nEPT: Move common code to paging_tmpl.h
   nEPT: Add EPT tables support to paging_tmpl.h
   nEPT: MMU context for nested EPT
   nEPT: Nested INVEPT
   nEPT: Advertise EPT to L1
   nEPT: Some additional comments
   nEPT: Miscelleneous cleanups

Yang Zhang (2):
   nEPT: Redefine EPT-specific link_shadow_page()
   nEPT: Add nEPT violation/misconfigration support

  arch/x86/include/asm/kvm_host.h |    4 +
  arch/x86/include/asm/vmx.h      |    2 +
  arch/x86/include/uapi/asm/vmx.h |    1 +
  arch/x86/kvm/mmu.c              |  170 +++++++++++++++++-------------
  arch/x86/kvm/mmu.h              |    2 +
  arch/x86/kvm/paging_tmpl.h      |  176 +++++++++++++++++++++++++++----
  arch/x86/kvm/vmx.c              |  220 ++++++++++++++++++++++++++++++++++++---
  arch/x86/kvm/x86.c              |   11 --
  8 files changed, 467 insertions(+), 119 deletions(-)


Applied, thanks (rebased on top of Xiao's walk_addr_generic fix).

Paolo
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