[PATCH 03/31] mips/kvm: Fix 32-bitisms in kvm_locore.S

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From: David Daney <david.daney@xxxxxxxxxx>

For a warning free compile, we need to use the width aware PTR_LI and
PTR_LA macros.  Use LI variant for immediate data and LA variant for
addresses.

Signed-off-by: David Daney <david.daney@xxxxxxxxxx>
---
 arch/mips/kvm/kvm_locore.S | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/mips/kvm/kvm_locore.S b/arch/mips/kvm/kvm_locore.S
index dca2aa6..e86fa2a 100644
--- a/arch/mips/kvm/kvm_locore.S
+++ b/arch/mips/kvm/kvm_locore.S
@@ -310,7 +310,7 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
     LONG_S  t0, VCPU_R26(k1)
 
     /* Get GUEST k1 and save it in VCPU */
-    la      t1, ~0x2ff
+	PTR_LI	t1, ~0x2ff
     mfc0    t0, CP0_EBASE
     and     t0, t0, t1
     LONG_L  t0, 0x3000(t0)
@@ -384,14 +384,14 @@ NESTED (MIPSX(GuestException), CALLFRAME_SIZ, ra)
     mtc0        k0, CP0_DDATA_LO
 
     /* Restore RDHWR access */
-    la      k0, 0x2000000F
+	PTR_LI	k0, 0x2000000F
     mtc0    k0,  CP0_HWRENA
 
     /* Jump to handler */
 FEXPORT(__kvm_mips_jump_to_handler)
     /* XXXKYMA: not sure if this is safe, how large is the stack?? */
     /* Now jump to the kvm_mips_handle_exit() to see if we can deal with this in the kernel */
-    la          t9,kvm_mips_handle_exit
+	PTR_LA	t9, kvm_mips_handle_exit
     jalr.hb     t9
     addiu       sp,sp, -CALLFRAME_SIZ           /* BD Slot */
 
@@ -566,7 +566,7 @@ __kvm_mips_return_to_host:
     mtlo    k0
 
     /* Restore RDHWR access */
-    la      k0, 0x2000000F
+	PTR_LI	k0, 0x2000000F
     mtc0    k0,  CP0_HWRENA
 
 
-- 
1.7.11.7

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