On Mon, Apr 29, 2013 at 8:37 AM, Paolo Bonzini <pbonzini@xxxxxxxxxx> wrote: > Il 26/04/2013 08:43, Jun Nakajima ha scritto: >> diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h >> index e13b6c5..bd370e7 100644 >> --- a/arch/x86/kvm/paging_tmpl.h >> +++ b/arch/x86/kvm/paging_tmpl.h >> @@ -349,7 +349,12 @@ error: >> >> walker->fault.vector = PF_VECTOR; >> walker->fault.error_code_valid = true; >> +#if PTTYPE != PTTYPE_EPT >> walker->fault.error_code = errcode; >> +#else >> + /* Reuse bits [2:0] of EPT violation */ >> + walker->fault.error_code = vcpu->arch.exit_qualification & 0x7; >> +#endif >> walker->fault.address = addr; >> walker->fault.nested_page_fault = mmu != vcpu->arch.walk_mmu; >> > > I'm not sure that this is a step in the right direction. > > errcode is dropped completely, but it would be needed to rebuild bits > 3:5 of the exit qualification. > > Perhaps it is better to access vcpu->arch.exit_qualification in > nested_ept_inject_page_fault, and mix it with the error code from > walker->fault to compute bits 3:5? Yes. We need to generate those bits from the walk of the guest EPT page tables, and combine them. I'll update the patches, fixing the issues in Xinhao's patch. -- Jun Intel Open Source Technology Center -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
