Re: [PATCH v2 09/18] KVM/MIPS32: COP0 accesses profiling.

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On Wed, Nov 21, 2012 at 06:34:07PM -0800, Sanjay Lal wrote:
> 
> Signed-off-by: Sanjay Lal <sanjayl@xxxxxxxxxxx>
> ---
>  arch/mips/kvm/kvm_mips_stats.c | 81 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 81 insertions(+)
>  create mode 100644 arch/mips/kvm/kvm_mips_stats.c
> 
> diff --git a/arch/mips/kvm/kvm_mips_stats.c b/arch/mips/kvm/kvm_mips_stats.c
> new file mode 100644
> index 0000000..e442a26
> --- /dev/null
> +++ b/arch/mips/kvm/kvm_mips_stats.c
> @@ -0,0 +1,81 @@
> +/*
> +* This file is subject to the terms and conditions of the GNU General Public
> +* License.  See the file "COPYING" in the main directory of this archive
> +* for more details.
> +*
> +* KVM/MIPS: COP0 access histogram
> +*
> +* Copyright (C) 2012  MIPS Technologies, Inc.  All rights reserved.
> +* Authors: Sanjay Lal <sanjayl@xxxxxxxxxxx>
> +*/
> +
> +#include <linux/kvm_host.h>
> +
> +char *kvm_mips_exit_types_str[MAX_KVM_MIPS_EXIT_TYPES] = {
> +	"WAIT",
> +	"CACHE",
> +	"Signal",
> +	"Interrupt",
> +	"COP0/1 Unusable",
> +	"TLB Mod",
> +	"TLB Miss (LD)",
> +	"TLB Miss (ST)",
> +	"Address Err (ST)",
> +	"Address Error (LD)",
> +	"System Call",
> +	"Reserved Inst",
> +	"Break Inst",
> +	"D-Cache Flushes",
> +};
> +
> +char *kvm_cop0_str[N_MIPS_COPROC_REGS] = {
> +	"Index",
> +	"Random",
> +	"EntryLo0",
> +	"EntryLo1",
> +	"Context",
> +	"PG Mask",
> +	"Wired",
> +	"HWREna",
> +	"BadVAddr",
> +	"Count",
> +	"EntryHI",
> +	"Compare",
> +	"Status",
> +	"Cause",
> +	"EXC PC",
> +	"PRID",
> +	"Config",
> +	"LLAddr",
> +	"Watch Lo",
> +	"Watch Hi",
> +	"X Context",
> +	"Reserved",
> +	"Impl Dep",
> +	"Debug",
> +	"DEPC",
> +	"PerfCnt",
> +	"ErrCtl",
> +	"CacheErr",
> +	"TagLo",
> +	"TagHi",
> +	"ErrorEPC",
> +	"DESAVE"
> +};
> +
> +int kvm_mips_dump_stats(struct kvm_vcpu *vcpu)
> +{
> +	int i, j __unused;
> +#ifdef CONFIG_KVM_MIPS_DEBUG_COP0_COUNTERS
> +	printk("\nKVM VCPU[%d] COP0 Access Profile:\n", vcpu->vcpu_id);
> +	for (i = 0; i < N_MIPS_COPROC_REGS; i++) {
> +		for (j = 0; j < N_MIPS_COPROC_SEL; j++) {
> +			if (vcpu->arch.cop0->stat[i][j])
> +				printk("%s[%d]: %lu\n", kvm_cop0_str[i], j,
> +				       vcpu->arch.cop0->stat[i][j]);
> +		}
> +	}
> +#endif
> +
> +	return 0;
> +}
You need to use ftrace event for that. Much more flexible with perf
integration and no need to recompile to enabled/disable.

--
			Gleb.
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