Thus spake Gleb Natapov <gleb@xxxxxxxxxx>: > On Thu, Nov 29, 2012 at 03:07:38PM +0100, Julian Stecklina wrote: >> Hello, >> >> we have noticed that at least on 3.6.8 with VMX after a VCPU has been >> reset via the INIT-SIPI-SIPI sequence its register state violates >> Intel's specification. [...] >> Shouldn't vmx_vcpu_reset actively clear those registers? And from a >> quick glance at the SVM code the problem might exist there, too. >> > It should, so why not move the fix to kvm_vcpu_reset() so it will work > for both. Also what about R8-R15? Intel SDM says nothing about them in > the section you mention, but in Volume 1 section 3.4.1.1 is says: [...] > I take it that they are undefined on the first transition to 64-bit mode > too. AMD spec says that they should be zeroed on reset, so lets do that. > Also SVM does not set EDX to correct value on reset. I'll post a revised patch later today. Julian -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
