APIC virtualization is a new feature which can eliminate most of VM exit
when vcpu handles a interrupt:
APIC register virtualization:
APIC read access doesn't cause APIC-access VM exits.
APIC write becomes trap-like.
Virtual interrupt delivery:
Virtual interrupt delivery avoids KVM to inject vAPIC interrupts
manually, which is fully taken care of by the hardware.
Please refer to Intel SDM volume 3, chapter 29 for more details.
Changes v2 to v3:
* Drop Posted Interrupt patch from v3.
According Gleb's suggestion, we will use global vector for all VCPUs as notification
event vector. So we will rewrite the Posted Interrupt patch. And resend it later.
* Use TMR to set the eoi exiting bitmap. We only want to set eoi exiting bitmap for
the interrupt which is level trigger or has notifier in EOI write path. So TMR is
enough to distinguish the interrupt trigger mode.
* Simplify some code according Gleb's comments.
* rebased on top of KVM upstream.
Changes v1 to v2:
* Add Posted Interrupt support in this series patch.
* Since there is a notifer hook in vAPIC EOI for PIT interrupt. So always Set PIT
interrupt in eoi exit bitmap to force vmexit when EOI to interrupt.
* Rebased on top of KVM upstream
Yang Zhang (4):
x86: PIT connects to pin 2 of IOAPIC
x86, apicv: add APICv register virtualization support
x86, apicv: add virtual interrupt delivery support
x86, apicv: add virtual x2apic support
arch/x86/include/asm/kvm_host.h | 4 +
arch/x86/include/asm/vmx.h | 13 ++
arch/x86/kvm/irq.c | 53 ++++++---
arch/x86/kvm/lapic.c | 72 +++++++++++--
arch/x86/kvm/lapic.h | 8 ++
arch/x86/kvm/svm.c | 19 +++
arch/x86/kvm/vmx.c | 232 +++++++++++++++++++++++++++++++++++++--
arch/x86/kvm/x86.c | 34 +++++-
virt/kvm/ioapic.c | 3 +-
9 files changed, 398 insertions(+), 40 deletions(-)
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