How to do fast accesses to LAPIC TPR under kvm?

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Hi,

OpenBSD/i386 seems to be one of the few operating systems that still 
uses the LAPIC taks priority register for interrupt handling. On AMD 
CPUs and on older Intel CPUs without the flexpriority feature, this 
causes a huge performance impact on kvm. I have seen slowdown by a 
factor of 10.

Is there a way to use the TPR under kvm without the slowdown? There 
are some MSRs inherited from Hyper-V, but using these does not make 
that much difference. I think this is because they still cause an 
vmexit for every TPR access. I expect the the same is true for x2apic 
emulation, isn't it?

There is also the kvmvapic, but kvm does not expose a sane interface 
to it and only uses it for Windows XP specific binary patching.

Another possibility is TPR access via CR8 on AMD, but the missing 
cr8_legacy CPUID bit and this discussion [1] make me believe that this 
is not supported under kvm, at least in 32bit mode. Could this be 
easily fixed? If yes, would it solve the performance problems, i.e. 
offer performance comparable to Intel's flexpriority feature?

OpenBSD seems to be reluctant to stop using the TPR. In fact, in a 
recent discussion, there has been a suggestion that OpenBSD should 
switch to using TPR also on OpenBSD/amd64 to solve some problems with 
boot interrupts. How do you expect this would affect performance under 
kvm (if using CR8)?

Or do you have any other suggestions? One could also modify kvm to 
expose a real interface to kvmvapic, e.g. allow the guest OS to 
provide the virtual address of the option rom and the offset of the 
CPU number in the %fs segment, instead of using hard coded values for 
Windows XP.

Cheers,
Stefan

[1] http://www.mail-archive.com/kvm@xxxxxxxxxxxxxxx/msg30627.html
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