On 10/08/2012 07:30 PM, Marcelo Tosatti wrote: > > From Intel's manual: > > • If an execution of WRMSR to the IA32_TIME_STAMP_COUNTER MSR adds (or > subtracts) value X from the TSC, > the logical processor also adds (or subtracts) value X from the > IA32_TSC_ADJUST MSR. > > This is not handled in the patch. > > To support migration, it will be necessary to differentiate between > guest initiated and userspace-model initiated msr write. That is, > only guest initiated TSC writes should affect the value of > IA32_TSC_ADJUST MSR. > > Avi, any better idea? > I think we need that anyway, since there are some read-only MSRs that need to be configured by the host (nvmx capabilities). So if we add that feature it will be useful elsewhere. I don't think it's possible to do it in any other way: "Local offset value of the IA32_TSC for a logical processor. Reset value is Zero. A write to IA32_TSC will modify the local offset in IA32_TSC_ADJUST and the content of IA32_TSC, but does not affect the internal invariant TSC hardware." What we want to do is affect the internal invariant TSC hardware, so we can't do that through the normal means. btw, will tsc writes from userspace (after live migration) cause tsc skew? If so we should think how to model a guest-wide tsc. -- error compiling committee.c: too many arguments to function -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
