As our emulation gets more sophisticated, we need to know what CPU model
we're dealing with. Particularly for some of the nastier workarounds.
Let's start with Cortex A-15. We can then test the MIDR elsewhere in the
code, knowing that it's one of a finite set of allowed values.
Signed-off-by: Rusty Russell <rusty.russell@xxxxxxxxxx>
---
arch/arm/kvm/guest.c | 18 ++++++++++++++++++
1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/arch/arm/kvm/guest.c b/arch/arm/kvm/guest.c
index c0adab0..2195bc9 100644
--- a/arch/arm/kvm/guest.c
+++ b/arch/arm/kvm/guest.c
@@ -82,6 +82,24 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
{
struct kvm_vcpu_regs *vcpu_regs = &vcpu->arch.regs;
+ u32 impl, var, arch, part;
+
+ /* Check we understand what CPU we're being asked to emulate. */
+ impl = (regs->cp15.c0_midr & 0xFF000000) >> 24;
+ var = (regs->cp15.c0_midr & 0x00F00000) >> 20;
+ arch = (regs->cp15.c0_midr & 0x000F0000) >> 16;
+ part = (regs->cp15.c0_midr & 0x0000FFF0) >> 4;
+
+ switch (regs->cp15.c0_midr >> 24) {
+ case 'A': /* ARM */
+ /* Cortex-A15 */
+ if (var == 0x2 && arch == 0xF && part == 0xC0F)
+ break;
+ else
+ return -EINVAL;
+ default:
+ return -EINVAL;
+ }
memcpy(&(vcpu_regs->usr_regs[0]), regs->regs0_7, sizeof(u32) * 8);
memcpy(&(vcpu_regs->usr_regs[8]), regs->usr_regs8_12, sizeof(u32) * 5);
--
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