On 2012-01-24 14:06, Gleb Natapov wrote:
> The spec says that during initialization "The edge sense circuit is
> reset which means that following initialization an interrupt request
> (IR) input must make a low-to-high transition to generate an interrupt",
> but currently if edge triggered interrupt is in IRR it is delivered
> after i8259 initialization.
>
> Signed-off-by: Gleb Natapov <gleb@xxxxxxxxxx>
> diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
> index b6a7353..81cf4fa 100644
> --- a/arch/x86/kvm/i8259.c
> +++ b/arch/x86/kvm/i8259.c
> @@ -307,6 +307,7 @@ static void pic_ioport_write(void *opaque, u32 addr, u32 val)
> if (val & 0x10) {
> s->init4 = val & 1;
> s->last_irr = 0;
> + s->irr &= s->elcr;
Does & elcr make a relevant difference? QEMU simply sets irr to 0. If
that's an issue, we need to fix both.
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
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