On Thu, Nov 24, 2011 at 11:06:44AM +1030, Rusty Russell wrote:
> > > +/* Fields in VIRTIO_PCI_CAP_COMMON_CFG: */
> > > +struct virtio_pci_common_cfg {
> > > + /* About the whole device. */
> > > + __u64 device_features; /* read-only */
> > > + __u64 guest_features; /* read-write */
> > > + __u64 queue_address; /* read-write */
> > > + __u16 msix_config; /* read-write */
> > > + __u8 device_status; /* read-write */
> > > + __u8 unused;
> > > +
> > > + /* About a specific virtqueue. */
> > > + __u16 queue_select; /* read-write */
> > > + __u16 queue_align; /* read-write, power of 2. */
> > > + __u16 queue_size; /* read-write, power of 2. */
> > > + __u16 queue_msix_vector;/* read-write */
> > > +};
> >
> > Slightly confusing as the registers are in fact little endian ...
>
> Good point, should mark them appropriately with __le16. That makes it
> even clearer.
>
> Thanks,
> Rusty.
Do we still require atomic access to fields in common cfg?
If yes it's a problem as some systems don't have 64 bit
addresses. If no, implementations might get harder.
--
MST
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