On Mon, Nov 07, 2011 at 03:09:46PM +0100, Peter Zijlstra wrote:
> On Thu, 2011-11-03 at 14:33 +0200, Gleb Natapov wrote:
> > + case 0xa: { /* Architectural Performance Monitoring */
> > + struct x86_pmu_capability cap;
> > +
> > + perf_get_x86_pmu_capability(&cap);
> > +
> > + /*
> > + * Only support guest architectural pmu on a host
> > + * with architectural pmu.
> > + */
> > + if (!cap.version)
> > + memset(&cap, 0, sizeof(cap));
> > +
> > + entry->eax = min(cap.version, 2)
> > + | (cap.num_counters_gp << 8)
> > + | (cap.bit_width_gp << 16)
> > + | (cap.events_mask_len << 24);
> > + entry->ebx = cap.events_mask;
> > + entry->ecx = 0;
> > + entry->edx = cap.num_counters_fixed
> > + | (cap.bit_width_fixed << 5);
> > + break;
> > + }
>
> would it make sense to use the cpuid10_e[ad]x unions to fill out that
> data?
Do you mean by doing cpuid here directly instead of checking perf
capability? We do not (entirely) pass through PMU to a guest. We emulate
it using perf subsystem and I can imaging cases where perf capabilities
will be different from what host reports. For instance host cpu may have
an errata that will make one of its counters unusable. In such case
code that checks for errata will have to be duplicated here too. Or we
may wan to emulate architectural PMU for a guest running on AMD host.
--
Gleb.
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