On 2011-10-17 11:54, Avi Kivity wrote:
> On 10/17/2011 11:17 AM, Lai Jiangshan wrote:
>> On 10/16/2011 05:39 PM, Avi Kivity wrote:
>>> On 10/14/2011 11:03 AM, Lai Jiangshan wrote:
>>>> Currently, NMI interrupt is blindly sent to all the vCPUs when NMI
>>>> button event happens. This doesn't properly emulate real hardware on
>>>> which NMI button event triggers LINT1. Because of this, NMI is sent to
>>>> the processor even when LINT1 is masked in LVT. For example, this
>>>> causes the problem that kdump initiated by NMI sometimes doesn't work
>>>> on KVM, because kdump assumes NMI is masked on CPUs other than CPU0.
>>>>
>>>> With this patch, we introduce introduce KVM_SET_LINT1,
>>>> and we can use KVM_SET_LINT1 to correctly emulate NMI button
>>>> without change the old KVM_NMI behavior.
>>>>
>>>> @@ -759,6 +762,8 @@ struct kvm_clock_data {
>>>> #define KVM_CREATE_SPAPR_TCE _IOW(KVMIO, 0xa8, struct kvm_create_spapr_tce)
>>>> /* Available with KVM_CAP_RMA */
>>>> #define KVM_ALLOCATE_RMA _IOR(KVMIO, 0xa9, struct kvm_allocate_rma)
>>>> +/* Available with KVM_CAP_SET_LINT1 for x86 */
>>>> +#define KVM_SET_LINT1 _IO(KVMIO, 0xaa)
>>>>
>>>>
>>>
>>> LINT1 may have been programmed as a level -triggered interrupt instead
>>> of edge triggered (NMI or interrupt). We can use the ioctl argument for
>>> the level (and pressing the NMI button needs to pulse the level to 1 and
>>> back to 0).
>>>
>>
>> Hi, Avi,
>>
>> How to handle level=0 in the kernel?
>> Or just ignore it?
>
> It needs to be handled according to the delivery mode, polarity, and
> trigger mode bits in the LVT.
>
> For example, a Fixed delivery mode with polarity 1 and level trigger
> mode will post the interrupt as long as it is in level 0 and not masked
> by the ISR. __apic_accept_irq() should handle this.
But I think it's not yet fully prepared for this (level is only
considered for APIC_DM_INIT e.g.).
Jan
--
Siemens AG, Corporate Technology, CT T DE IT 1
Corporate Competence Center Embedded Linux
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