On Thu, Jul 28, 2011 at 04:36:17AM -0400, Avi Kivity wrote: > Architecturally, PDPTEs are cached in the PDPTRs when CR3 is reloaded. > On SVM, it is not possible to implement this, but on VMX this is possible > and was indeed implemented until nested SVM changed this to unconditionally > read PDPTEs dynamically. This has noticable impact when running PAE guests. > > Fix by changing the MMU to read PDPTRs from the cache, falling back to > reading from memory for the nested MMU. > > Signed-off-by: Avi Kivity <avi@xxxxxxxxxx> Hmm, interesting. Sorry for breaking it. I tested the patch on nested svm, it works fine. Tested-by: Joerg Roedel <joerg.roedel@xxxxxxx> -- AMD Operating System Research Center Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach General Managers: Alberto Bozzo, Andrew Bowd Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632 -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
