On 06/14/2011 03:10 PM, Yang, Wei wrote:
This patch enalbes RDWRGSFS feature to KVM guests. Write/read FS/GS base instructions enable user level code to read/write FS& GS segment base registers for thread local storage.
Patches look good, but something appears missing - usually when an instruction is enabled by a cr4 bit, there is an additional cpuid bit that gets turned on, so userspace can tell if it is safe to use the instruction. Is it not the case here?
Unrelated: what about enabling it for host userspace? You'll need to modify IST interrupt entry points (NMI/MCE etc) not to look at the value of gsbase, but it shouldn't be too difficult.
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