On 27.05.2011, at 22:59, Segher Boessenkool wrote: >>>> I do the check there because I was having problems where, if the HDEC >>>> goes negative before we do the partition switch, we would occasionally >>>> not get the HDEC interrupt at all until the next time HDEC went >>>> negative, ~ 8.4 seconds later. >>> >>> Yikes - so HDEC is edge and doesn't even keep the interrupt line up? >>> That sounds like a serious hardware limitation. What if you only use >>> HDEC and it triggers while interrupts are off in a critical section? >>> Is the hardware really that broken? >> >> If HDEC expires when interrupts are off, the HDEC interrupt stays >> pending until interrupts get re-enabled. I'm not sure exactly what >> the conditions are that cause an HDEC interrupt to get lost, but they >> seem to involve at least a partition switch. > > On some CPUs, if the top bit of the decrementer is 0 again when you re-enable > the interrupt, the interrupt is lost (so it is actually level-triggered). > The arch books talk a bit about this AFAIR. Sure, but that shouldn't happen with HDEC during the odd 50 instructions that it takes to enter the guest :) Alex -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
