On 05/22/2011 01:39 AM, Avi Kivity wrote:
On 05/20/2011 05:46 PM, Anthony Liguori wrote:
On 05/20/2011 09:40 AM, Richard Henderson wrote:
On 05/20/2011 07:31 AM, Anthony Liguori wrote:
But is this a characteristic of devices or is this a characteristic
of the chipset/CPU?
Chipset.
So if the chipset only allows accesses that are 64-bit, then you'll
want to have hierarchical dispatch filter non 64-bit accesses and
raise an MCE appropriately.
So you don't need anything in MemoryRegion, you need code in the
dispatch path.
MemoryRegion *is* the dispatch path. Only done declaratively so we can
flatten it whenever it changes.
We don't want dispatch to be 100% declarative. That's what will cause
the API to get horrendously ugly.
An example is PCI-bus level endianness conversion. I also believe the
Sparc IOMMU has an xor engine.
You could add a 'bool swap_endian' and an 'uint32_t xor_mask' in
MemoryRegion but now you're adding a ton of platform specific knowledge
to what should be an independent layer.
Regards,
Anthony Liguori
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